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author | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-08-04 03:25:14 +0000 |
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committer | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-08-04 03:25:14 +0000 |
commit | 8332983e2e334c414eeca19b5742a9ec21194fb7 (patch) | |
tree | c61f0e69014d02592e418f25222831ff78ec5061 /UefiCpuPkg | |
parent | c5493c54d5db5e5019c261ad15a28e9455c0d79d (diff) | |
download | edk2-8332983e2e334c414eeca19b5742a9ec21194fb7.zip edk2-8332983e2e334c414eeca19b5742a9ec21194fb7.tar.gz edk2-8332983e2e334c414eeca19b5742a9ec21194fb7.tar.bz2 |
UefiCpuPkg: Replace the un-necessary WBINVD instruction at the reset vector with two NOPs in VTF0.
Signed-off-by: rsun3
Reviewed-by: mdkinney
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12085 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw | bin | 500 -> 500 bytes | |||
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw | bin | 484 -> 484 bytes | |||
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw | bin | 884 -> 884 bytes | |||
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw | bin | 28676 -> 28676 bytes | |||
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw | bin | 28676 -> 28676 bytes | |||
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw | bin | 28676 -> 28676 bytes | |||
-rw-r--r-- | UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm | 5 |
7 files changed, 3 insertions, 2 deletions
diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw Binary files differindex 3a8a46d..ec6bcfd 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw +++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.port80.raw diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw Binary files differindex 7379cb7..02cb66c 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw +++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.raw diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw Binary files differindex 4b72784..58542ad 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw +++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.ia32.serial.raw diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw Binary files differindex 487d815..393b6ef 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw +++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.port80.raw diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw Binary files differindex 1f4e9fc..7ab1161 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw +++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.raw diff --git a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw Binary files differindex 9b08b31..f32e81a 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw +++ b/UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.x64.serial.raw diff --git a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm index 3764b4a..d0830ec 100644 --- a/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm +++ b/UefiCpuPkg/ResetVector/Vtf0/Ia16/ResetVectorVtf0.asm @@ -2,7 +2,7 @@ ; @file
; First code exectuted by processor after resetting.
;
-; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2008 - 2011, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -48,7 +48,8 @@ resetVector: ;
; This is where the processor will begin execution
;
- wbinvd
+ nop
+ nop
jmp short EarlyBspInitReal16
ALIGN 16
|