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author | Jeff Fan <jeff.fan@intel.com> | 2015-11-25 02:47:34 +0000 |
---|---|---|
committer | vanjeff <vanjeff@Edk2> | 2015-11-25 02:47:34 +0000 |
commit | 2f0261b7dcab49b1ee503a4b545238b59f58123d (patch) | |
tree | db4291b00a9264998057bd0bdb441981bc1a0748 /UefiCpuPkg | |
parent | bf14e1077aa66ef1cb49bdaf06181de48bb2477f (diff) | |
download | edk2-2f0261b7dcab49b1ee503a4b545238b59f58123d.zip edk2-2f0261b7dcab49b1ee503a4b545238b59f58123d.tar.gz edk2-2f0261b7dcab49b1ee503a4b545238b59f58123d.tar.bz2 |
UefiCpuPkg/CpuMpPei: Set X2APIC flag if one x2APIC ID larger than 254
If there are any logical processor reporting an APIC ID of 255 or greater, set
X2ApicEnable flag.
GetInitialApicId() will return x2APIC ID if CPUID leaf B supported.
Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18933 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r-- | UefiCpuPkg/CpuMpPei/CpuMpPei.c | 21 | ||||
-rw-r--r-- | UefiCpuPkg/CpuMpPei/CpuMpPei.h | 2 |
2 files changed, 18 insertions, 5 deletions
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.c b/UefiCpuPkg/CpuMpPei/CpuMpPei.c index 8e35f28..8ed5243 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.c +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.c @@ -146,11 +146,20 @@ ApCFunction ( PeiCpuMpData = ExchangeInfo->PeiCpuMpData;
if (PeiCpuMpData->InitFlag) {
//
- // This is first time AP wakeup, get BIST inforamtion from AP stack
+ // This is first time AP wakeup, get BIST information from AP stack
//
BistData = *(UINTN *) (PeiCpuMpData->Buffer + NumApsExecuting * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));
- PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetInitialApicId ();
PeiCpuMpData->CpuData[NumApsExecuting].Health.Uint32 = (UINT32) BistData;
+ PeiCpuMpData->CpuData[NumApsExecuting].ApicId = GetInitialApicId ();
+ if (PeiCpuMpData->CpuData[NumApsExecuting].ApicId >= 0xFF) {
+ //
+ // Set x2APIC mode if there are any logical processor reporting
+ // an APIC ID of 255 or greater.
+ //
+ AcquireSpinLock(&PeiCpuMpData->MpLock);
+ PeiCpuMpData->X2ApicEnable = TRUE;
+ ReleaseSpinLock(&PeiCpuMpData->MpLock);
+ }
//
// Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.
//
@@ -363,15 +372,16 @@ CountProcessorNumber ( //
if (PcdGet32 (PcdCpuMaxLogicalProcessorNumber) > 1) {
//
- // Send broadcast IPI to APs to wakeup APs
+ // Send 1st broadcast IPI to APs to wakeup APs
//
- PeiCpuMpData->InitFlag = 1;
+ PeiCpuMpData->InitFlag = TRUE;
+ PeiCpuMpData->X2ApicEnable = FALSE;
WakeUpAP (PeiCpuMpData, TRUE, 0, NULL, NULL);
//
// Wait for AP task to complete and then exit.
//
MicroSecondDelay (PcdGet32 (PcdCpuApInitTimeOutInMicroSeconds));
- PeiCpuMpData->InitFlag = 0;
+ PeiCpuMpData->InitFlag = FALSE;
PeiCpuMpData->CpuCount += (UINT32)PeiCpuMpData->MpCpuExchangeInfo->NumApsExecuting;
ASSERT (PeiCpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));
//
@@ -439,6 +449,7 @@ PrepareAPStartupVector ( PeiCpuMpData->CpuData[0].ApicId = GetInitialApicId ();
PeiCpuMpData->CpuData[0].Health.Uint32 = 0;
PeiCpuMpData->EndOfPeiFlag = FALSE;
+ InitializeSpinLock(&PeiCpuMpData->MpLock);
CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
//
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h index 9325a12..de90113 100644 --- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h +++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h @@ -124,6 +124,7 @@ typedef struct { // PEI CPU MP Data save in memory
//
struct _PEI_CPU_MP_DATA {
+ SPIN_LOCK MpLock;
UINT32 CpuCount;
UINT32 BspNumber;
UINTN Buffer;
@@ -137,6 +138,7 @@ struct _PEI_CPU_MP_DATA { volatile UINT32 FinishedCount;
BOOLEAN EndOfPeiFlag;
BOOLEAN InitFlag;
+ BOOLEAN X2ApicEnable;
CPU_EXCHANGE_ROLE_INFO BSPInfo;
CPU_EXCHANGE_ROLE_INFO APInfo;
MTRR_SETTINGS MtrrTable;
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