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author | Eric Dong <eric.dong@intel.com> | 2018-08-10 10:27:42 +0800 |
---|---|---|
committer | Eric Dong <eric.dong@intel.com> | 2018-08-16 08:42:00 +0800 |
commit | 293f876618c319ca08687e55e126332216185ad6 (patch) | |
tree | 26be1641ce7a453eb52bfabda58690dde0f4689e /UefiCpuPkg | |
parent | 0ca81c0d373ce92a61199faf3d207eefdca1eaa2 (diff) | |
download | edk2-293f876618c319ca08687e55e126332216185ad6.zip edk2-293f876618c319ca08687e55e126332216185ad6.tar.gz edk2-293f876618c319ca08687e55e126332216185ad6.tar.bz2 |
UefiCpuPkg/PiSmmCpuDxeSmm: Use GDT/IDT saved in Smram.
Current implementation will copy GDT/IDT at SmmReadyToLock point
from ACPI NVS memory to Smram. Later at S3 resume phase, it restore
the memory saved in Smram to ACPI NVS. It can directly use GDT/IDT
saved in Smram instead of restore the original ACPI NVS memory.
This patch do this change.
Test Done:
Do the OS boot and S3 resume test.
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg')
-rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 31 |
1 files changed, 14 insertions, 17 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 0b8ef70..abd8a5a 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -66,9 +66,6 @@ ACPI_CPU_DATA mAcpiCpuData; volatile UINT32 mNumberToFinish;
MP_CPU_EXCHANGE_INFO *mExchangeInfo;
BOOLEAN mRestoreSmmConfigurationInS3 = FALSE;
-VOID *mGdtForAp = NULL;
-VOID *mIdtForAp = NULL;
-VOID *mMachineCheckHandlerForAp = NULL;
MP_MSR_LOCK *mMsrSpinLocks = NULL;
UINTN mMsrSpinLockCount;
UINTN mMsrCount = 0;
@@ -448,13 +445,6 @@ PrepareApStartupVector ( CopyMem ((VOID *) (UINTN) &mExchangeInfo->GdtrProfile, (VOID *) (UINTN) mAcpiCpuData.GdtrProfile, sizeof (IA32_DESCRIPTOR));
CopyMem ((VOID *) (UINTN) &mExchangeInfo->IdtrProfile, (VOID *) (UINTN) mAcpiCpuData.IdtrProfile, sizeof (IA32_DESCRIPTOR));
- //
- // Copy AP's GDT, IDT and Machine Check handler from SMRAM to ACPI NVS memory
- //
- CopyMem ((VOID *) mExchangeInfo->GdtrProfile.Base, mGdtForAp, mExchangeInfo->GdtrProfile.Limit + 1);
- CopyMem ((VOID *) mExchangeInfo->IdtrProfile.Base, mIdtForAp, mExchangeInfo->IdtrProfile.Limit + 1);
- CopyMem ((VOID *)(UINTN) mAcpiCpuData.ApMachineCheckHandlerBase, mMachineCheckHandlerForAp, mAcpiCpuData.ApMachineCheckHandlerSize);
-
mExchangeInfo->StackStart = (VOID *) (UINTN) mAcpiCpuData.StackAddress;
mExchangeInfo->StackSize = mAcpiCpuData.StackSize;
mExchangeInfo->BufferStart = (UINT32) StartupVector;
@@ -831,6 +821,9 @@ GetAcpiCpuData ( ACPI_CPU_DATA *AcpiCpuData;
IA32_DESCRIPTOR *Gdtr;
IA32_DESCRIPTOR *Idtr;
+ VOID *GdtForAp;
+ VOID *IdtForAp;
+ VOID *MachineCheckHandlerForAp;
if (!mAcpiS3Enable) {
return;
@@ -893,14 +886,18 @@ GetAcpiCpuData ( Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile;
Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile;
- mGdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);
- ASSERT (mGdtForAp != NULL);
- mIdtForAp = (VOID *) ((UINTN)mGdtForAp + (Gdtr->Limit + 1));
- mMachineCheckHandlerForAp = (VOID *) ((UINTN)mIdtForAp + (Idtr->Limit + 1));
+ GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);
+ ASSERT (GdtForAp != NULL);
+ IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1));
+ MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1));
+
+ CopyMem (GdtForAp, (VOID *)Gdtr->Base, Gdtr->Limit + 1);
+ CopyMem (IdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1);
+ CopyMem (MachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize);
- CopyMem (mGdtForAp, (VOID *)Gdtr->Base, Gdtr->Limit + 1);
- CopyMem (mIdtForAp, (VOID *)Idtr->Base, Idtr->Limit + 1);
- CopyMem (mMachineCheckHandlerForAp, (VOID *)(UINTN)mAcpiCpuData.ApMachineCheckHandlerBase, mAcpiCpuData.ApMachineCheckHandlerSize);
+ Gdtr->Base = (UINTN)GdtForAp;
+ Idtr->Base = (UINTN)IdtForAp;
+ mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;
}
/**
|