summaryrefslogtreecommitdiff
path: root/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
diff options
context:
space:
mode:
authorStar Zeng <star.zeng@intel.com>2017-12-07 17:00:48 +0800
committerStar Zeng <star.zeng@intel.com>2017-12-08 12:29:24 +0800
commit1015fb3c1beb27eabd77e97f06f6b1012bacf3d8 (patch)
tree177694519c28f96cb3b75fc320f4ff9af50ee7f7 /UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
parent5d0e003c8ce2616c763f8edd4ac18f560d418e76 (diff)
downloadedk2-1015fb3c1beb27eabd77e97f06f6b1012bacf3d8.zip
edk2-1015fb3c1beb27eabd77e97f06f6b1012bacf3d8.tar.gz
edk2-1015fb3c1beb27eabd77e97f06f6b1012bacf3d8.tar.bz2
UefiCpuPkg PiSmmCpuDxeSmm: SMM profile and static paging mutual exclusion
SMM profile and static paging could not be enabled at the same time, this patch is to add check and comments to make sure it. Similar comments are also added for the case of static paging and heap guard for SMM. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Ruiyu Ni <ruiyu.ni@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c')
-rw-r--r--UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 6478c6c..0fe944f 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -919,17 +919,24 @@ SetPageTableAttributes (
//
// Don't do this if
// - no static page table; or
- // - SMM heap guard feature enabled
+ // - SMM heap guard feature enabled; or
// BIT2: SMM page guard enabled
// BIT3: SMM pool guard enabled
+ // - SMM profile feature enabled
//
if (!mCpuSmmStaticPageTable ||
- (PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) {
+ ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) ||
+ FeaturePcdGet (PcdCpuSmmProfileEnable)) {
//
- // Static paging and heap guard should not be enabled at the same time.
+ // Static paging and heap guard could not be enabled at the same time.
//
ASSERT (!(mCpuSmmStaticPageTable &&
(PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0));
+
+ //
+ // Static paging and SMM profile could not be enabled at the same time.
+ //
+ ASSERT (!(mCpuSmmStaticPageTable && FeaturePcdGet (PcdCpuSmmProfileEnable)));
return ;
}