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| author | Jeff Fan <jeff.fan@intel.com> | 2017-03-28 08:48:17 +0800 |
|---|---|---|
| committer | Jeff Fan <jeff.fan@intel.com> | 2017-04-01 11:44:44 +0800 |
| commit | 7ed6f78145ee63d27c7fbcba2fbc9f562c4ed0ae (patch) | |
| tree | e62e51ccae786354e6868eb7d1f8a1a3245d7be0 /UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | |
| parent | 4ef6c3850e66617df1ed35a4a390567d2bbf6b76 (diff) | |
| download | edk2-7ed6f78145ee63d27c7fbcba2fbc9f562c4ed0ae.zip edk2-7ed6f78145ee63d27c7fbcba2fbc9f562c4ed0ae.tar.gz edk2-7ed6f78145ee63d27c7fbcba2fbc9f562c4ed0ae.tar.bz2 | |
UefiCpuPkg/PiSmmCpuDxeSmm: Save SMM ranges info into global variables
v2:
Add #define SMRR_MAX_ADDRESS to clarify SMRR requirement.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 71af2f1..fc9b06e 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -1,7 +1,7 @@ /** @file
Agent Module to load other modules to deploy SMM Entry Vector for X86 CPU.
-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
This program and the accompanying materials
@@ -105,6 +105,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #define PAGING_2M_ADDRESS_MASK_64 0x000FFFFFFFE00000ull
#define PAGING_1G_ADDRESS_MASK_64 0x000FFFFFC0000000ull
+#define SMRR_MAX_ADDRESS BASE_4GB
+
typedef enum {
PageNone,
Page4K,
@@ -415,6 +417,8 @@ extern UINTN mSemaphoreSize; extern SPIN_LOCK *mPFLock;
extern SPIN_LOCK *mConfigSmmCodeAccessCheckLock;
extern SPIN_LOCK *mMemoryMappedLock;
+extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges;
+extern UINTN mSmmCpuSmramRangeCount;
//
// Copy of the PcdPteMemoryEncryptionAddressOrMask
|