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| author | Eric Dong <eric.dong@intel.com> | 2018-08-30 13:49:16 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:11 +0800 |
| commit | 47f75d2169eca006d93216f14f86ded6470f9be2 (patch) | |
| tree | ccc7a90aeb874d67605d33211e66aee5556a2923 /UefiCpuPkg/Include | |
| parent | b715c37eaa2bbb375a11c9fb5229d6d46181d3d0 (diff) | |
| download | edk2-47f75d2169eca006d93216f14f86ded6470f9be2.zip edk2-47f75d2169eca006d93216f14f86ded6470f9be2.tar.gz edk2-47f75d2169eca006d93216f14f86ded6470f9be2.tar.bz2 | |
UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h: Add new MSR.
Changes includes:
1. Add new MSR: MSR_SILVERMONT_PLATFORM_INFO
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/Include')
| -rw-r--r-- | UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h b/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h index 03bbd0a..c3d0f8c 100644 --- a/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h +++ b/UefiCpuPkg/Include/Register/Msr/SilvermontMsr.h @@ -376,6 +376,54 @@ typedef union { /**
+ Package. Platform Information: Contains power management and other model
+ specific features enumeration. See http://biosbits.org.
+
+ @param ECX MSR_SILVERMONT_PLATFORM_INFO (0x000000CE)
+ @param EAX Lower 32-bits of MSR value.
+ Described by the type MSR_SILVERMONT_PLATFORM_INFO_REGISTER.
+ @param EDX Upper 32-bits of MSR value.
+ Described by the type MSR_SILVERMONT_PLATFORM_INFO_REGISTER.
+
+ <b>Example usage</b>
+ @code
+ MSR_SILVERMONT_PLATFORM_INFO_REGISTER Msr;
+
+ Msr.Uint64 = AsmReadMsr64 (MSR_SILVERMONT_PLATFORM_INFO);
+ AsmWriteMsr64 (MSR_SILVERMONT_PLATFORM_INFO, Msr.Uint64);
+ @endcode
+**/
+#define MSR_SILVERMONT_PLATFORM_INFO 0x000000CE
+
+/**
+ MSR information returned for MSR index #MSR_SILVERMONT_PLATFORM_INFO
+**/
+typedef union {
+ ///
+ /// Individual bit fields
+ ///
+ struct {
+ UINT32 Reserved1:8;
+ ///
+ /// [Bits 15:8] Package. Maximum Non-Turbo Ratio (R/O) This is the ratio
+ /// of the maximum frequency that does not require turbo. Frequency =
+ /// ratio * Scalable Bus Frequency.
+ ///
+ UINT32 MaximumNon_TurboRatio:8;
+ UINT32 Reserved2:16;
+ UINT32 Reserved3:32;
+ } Bits;
+ ///
+ /// All bit fields as a 32-bit value
+ ///
+ UINT32 Uint32;
+ ///
+ /// All bit fields as a 64-bit value
+ ///
+ UINT64 Uint64;
+} MSR_SILVERMONT_PLATFORM_INFO_REGISTER;
+
+/**
Module. C-State Configuration Control (R/W) Note: C-state values are
processor specific C-state code names, unrelated to MWAIT extension C-state
parameters or ACPI CStates. See http://biosbits.org.
|