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| author | Eric Dong <eric.dong@intel.com> | 2018-09-25 08:32:31 +0800 |
|---|---|---|
| committer | Eric Dong <eric.dong@intel.com> | 2018-09-26 15:17:15 +0800 |
| commit | 4382394aa96b6d86ee9c2d6a7b8db674cc78b148 (patch) | |
| tree | 6b36b864d56ad6e83e2dd84f48fa5a106a1c84e2 /UefiCpuPkg/Include/Register | |
| parent | 140d713175f8a6176e67f179fc31b540461d81e5 (diff) | |
| download | edk2-4382394aa96b6d86ee9c2d6a7b8db674cc78b148.zip edk2-4382394aa96b6d86ee9c2d6a7b8db674cc78b148.tar.gz edk2-4382394aa96b6d86ee9c2d6a7b8db674cc78b148.tar.bz2 | |
UefiCpuPkg/Include/Register/ArchitecturalMsr.h: Change structure definition.
V3 changes include:
1. Keep ReservedX not change if bit info not changed for this field.
V2 changes include:
1. Use X in ReservedX fields from totally new value if MSR structure definition changed.
For example, if in current structure, the max reserved variable is Reserved2, in new
definition, reserved variable is begin with Reserved3.
V1 Changes includes:
1. Change fields which is reserved in old version: MSR_IA32_RTIT_CTL_REGISTER
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Diffstat (limited to 'UefiCpuPkg/Include/Register')
| -rw-r--r-- | UefiCpuPkg/Include/Register/ArchitecturalMsr.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h index b467ffa..22d64e9 100644 --- a/UefiCpuPkg/Include/Register/ArchitecturalMsr.h +++ b/UefiCpuPkg/Include/Register/ArchitecturalMsr.h @@ -4647,7 +4647,14 @@ typedef union { /// [Bit 3] User.
///
UINT32 User:1;
- UINT32 Reserved1:2;
+ ///
+ /// [Bit 4] PwrEvtEn.
+ ///
+ UINT32 PwrEvtEn:1;
+ ///
+ /// [Bit 5] FUPonPTW.
+ ///
+ UINT32 FUPonPTW:1;
///
/// [Bit 6] FabricEn. If (CPUID.(EAX=07H, ECX=0):ECX[3] = 1).
///
@@ -4672,7 +4679,10 @@ typedef union { /// [Bit 11] DisRETC.
///
UINT32 DisRETC:1;
- UINT32 Reserved2:1;
+ ///
+ /// [Bit 12] PTWEn.
+ ///
+ UINT32 PTWEn:1;
///
/// [Bit 13] BranchEn.
///
|