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| author | Tuan Phan <tphan@ventanamicro.com> | 2023-07-14 12:08:24 -0700 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-07-15 14:10:18 +0000 |
| commit | f220dcbba86bfc1222180c61bbd31dd6023433db (patch) | |
| tree | 8664b8b0e32903c179710e7f7018bc45722d1d7f /UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf | |
| parent | cc13dcc57675695d51efe0d61d772155c601a35b (diff) | |
| download | edk2-f220dcbba86bfc1222180c61bbd31dd6023433db.zip edk2-f220dcbba86bfc1222180c61bbd31dd6023433db.tar.gz edk2-f220dcbba86bfc1222180c61bbd31dd6023433db.tar.bz2 | |
UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode
During CpuDxe initialization, MMU will be setup with the highest
mode that HW supports.
Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Diffstat (limited to 'UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf')
| -rw-r--r-- | UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf b/UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf index e8fa254..9d9a5ef 100644 --- a/UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf +++ b/UefiCpuPkg/CpuDxeRiscV64/CpuDxeRiscV64.inf @@ -37,6 +37,8 @@ TimerLib
PeCoffGetEntryPointLib
RiscVSbiLib
+ RiscVMmuLib
+ CacheMaintenanceLib
[Sources]
CpuDxe.c
|