Code refinement.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10647 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 160 insertions, 22 deletions

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 66955c3..4546591 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -136,7 +136,7 @@ CommonExceptionHandler (
     "!!!! IA32 Exception Type - %08x !!!!\n",

     InterruptType

     ));

-  if (mErrorCodeFlag & (1 << InterruptType)) {

+  if ((mErrorCodeFlag & (1 << InterruptType)) != 0) {

     DEBUG ((

       EFI_D_ERROR,

       "ExceptionData - %08x\n",

@@ -217,7 +217,7 @@ CommonExceptionHandler (
     "!!!! X64 Exception Type - %016lx !!!!\n",

     (UINT64)InterruptType

     ));

-  if (mErrorCodeFlag & (1 << InterruptType)) {

+  if ((mErrorCodeFlag & (1 << InterruptType)) != 0) {

     DEBUG ((

       EFI_D_ERROR,

       "ExceptionData - %016lx\n",

@@ -676,11 +676,11 @@ InitializeMtrrMask (
 }

 

 /**

-  Gets GCD Mem Space type from MTRR Type

+  Gets GCD Mem Space type from MTRR Type.

 

-  This function gets GCD Mem Space type from MTRR Type

+  This function gets GCD Mem Space type from MTRR Type.

 

-  @param  MtrrAttribute  MTRR memory type

+  @param  MtrrAttributes  MTRR memory type

 

   @return GCD Mem Space type

 

@@ -1009,7 +1009,6 @@ RefreshGcdMemoryAttributes (
   Initialize Interrupt Descriptor Table for interrupt handling.

 

 **/

-STATIC

 VOID

 InitInterruptDescriptorTable (

   VOID

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.h b/UefiCpuPkg/CpuDxe/CpuDxe.h
index 91ae2b5..d42f82e 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.h
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.h
@@ -1,7 +1,7 @@
 /** @file

   CPU DXE Module.

 

-  Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2008 - 2010, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -12,8 +12,8 @@
 

 **/

 

-#ifndef _CPU_DXE_H

-#define _CPU_DXE_H

+#ifndef _CPU_DXE_H_

+#define _CPU_DXE_H_

 

 #include <PiDxe.h>

 

@@ -42,9 +42,21 @@
                                        )

 

 

-//

-// Function declarations

-//

+/**

+  Flush CPU data cache. If the instruction cache is fully coherent

+  with all DMA operations then function can just return EFI_SUCCESS.

+

+  @param  This              Protocol instance structure

+  @param  Start             Physical address to start flushing from.

+  @param  Length            Number of bytes to flush. Round up to chipset

+                            granularity.

+  @param  FlushType         Specifies the type of flush operation to perform.

+

+  @retval EFI_SUCCESS       If cache was flushed

+  @retval EFI_UNSUPPORTED   If flush type is not supported.

+  @retval EFI_DEVICE_ERROR  If requested range could not be flushed.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuFlushCpuDataCache (

@@ -54,18 +66,46 @@ CpuFlushCpuDataCache (
   IN EFI_CPU_FLUSH_TYPE        FlushType

   );

 

+/**

+  Enables CPU interrupts.

+

+  @param  This              Protocol instance structure

+

+  @retval EFI_SUCCESS       If interrupts were enabled in the CPU

+  @retval EFI_DEVICE_ERROR  If interrupts could not be enabled on the CPU.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuEnableInterrupt (

   IN EFI_CPU_ARCH_PROTOCOL     *This

   );

 

+/**

+  Disables CPU interrupts.

+

+  @param  This              Protocol instance structure

+

+  @retval EFI_SUCCESS       If interrupts were disabled in the CPU.

+  @retval EFI_DEVICE_ERROR  If interrupts could not be disabled on the CPU.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuDisableInterrupt (

   IN EFI_CPU_ARCH_PROTOCOL     *This

   );

 

+/**

+  Return the state of interrupts.

+

+  @param  This                   Protocol instance structure

+  @param  State                  Pointer to the CPU's current interrupt state

+

+  @retval EFI_SUCCESS            If interrupts were disabled in the CPU.

+  @retval EFI_INVALID_PARAMETER  State is NULL.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuGetInterruptState (

@@ -73,6 +113,18 @@ CpuGetInterruptState (
   OUT BOOLEAN                   *State

   );

 

+/**

+  Generates an INIT to the CPU.

+

+  @param  This              Protocol instance structure

+  @param  InitType          Type of CPU INIT to perform

+

+  @retval EFI_SUCCESS       If CPU INIT occurred. This value should never be

+                            seen.

+  @retval EFI_DEVICE_ERROR  If CPU INIT failed.

+  @retval EFI_UNSUPPORTED   Requested type of CPU INIT not supported.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuInit (

@@ -80,6 +132,26 @@ CpuInit (
   IN EFI_CPU_INIT_TYPE         InitType

   );

 

+/**

+  Registers a function to be called from the CPU interrupt handler.

+

+  @param  This                   Protocol instance structure

+  @param  InterruptType          Defines which interrupt to hook. IA-32

+                                 valid range is 0x00 through 0xFF

+  @param  InterruptHandler       A pointer to a function of type

+                                 EFI_CPU_INTERRUPT_HANDLER that is called

+                                 when a processor interrupt occurs.  A null

+                                 pointer is an error condition.

+

+  @retval EFI_SUCCESS            If handler installed or uninstalled.

+  @retval EFI_ALREADY_STARTED    InterruptHandler is not NULL, and a handler

+                                 for InterruptType was previously installed.

+  @retval EFI_INVALID_PARAMETER  InterruptHandler is NULL, and a handler for

+                                 InterruptType was not previously installed.

+  @retval EFI_UNSUPPORTED        The interrupt specified by InterruptType

+                                 is not supported.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuRegisterInterruptHandler (

@@ -88,6 +160,29 @@ CpuRegisterInterruptHandler (
   IN EFI_CPU_INTERRUPT_HANDLER     InterruptHandler

   );

 

+/**

+  Returns a timer value from one of the CPU's internal timers. There is no

+  inherent time interval between ticks but is a function of the CPU frequency.

+

+  @param  This                - Protocol instance structure.

+  @param  TimerIndex          - Specifies which CPU timer is requested.

+  @param  TimerValue          - Pointer to the returned timer value.

+  @param  TimerPeriod         - A pointer to the amount of time that passes

+                                in femtoseconds (10-15) for each increment

+                                of TimerValue. If TimerValue does not

+                                increment at a predictable rate, then 0 is

+                                returned.  The amount of time that has

+                                passed between two calls to GetTimerValue()

+                                can be calculated with the formula

+                                (TimerValue2 - TimerValue1) * TimerPeriod.

+                                This parameter is optional and may be NULL.

+

+  @retval EFI_SUCCESS           - If the CPU timer count was returned.

+  @retval EFI_UNSUPPORTED       - If the CPU does not have any readable timers.

+  @retval EFI_DEVICE_ERROR      - If an error occurred while reading the timer.

+  @retval EFI_INVALID_PARAMETER - TimerIndex is not valid or TimerValue is NULL.

+

+**/

 EFI_STATUS

 EFIAPI

 CpuGetTimerValue (

@@ -97,6 +192,22 @@ CpuGetTimerValue (
   OUT UINT64                      *TimerPeriod OPTIONAL

   );

 

+/**

+  Set memory cacheability attributes for given range of memeory.

+

+  @param  This                   Protocol instance structure

+  @param  BaseAddress            Specifies the start address of the

+                                 memory range

+  @param  Length                 Specifies the length of the memory range

+  @param  Attributes             The memory cacheability for the memory range

+

+  @retval EFI_SUCCESS            If the cacheability of that memory range is

+                                 set successfully

+  @retval EFI_UNSUPPORTED        If the desired operation cannot be done

+  @retval EFI_INVALID_PARAMETER  The input parameter is not correct,

+                                 such as Length = 0

+

+**/

 EFI_STATUS

 EFIAPI

 CpuSetMemoryAttributes (

@@ -106,29 +217,57 @@ CpuSetMemoryAttributes (
   IN UINT64                     Attributes

   );

 

+/**

+  Label of base address of IDT vector 0.

+

+  This is just a label of base address of IDT vector 0.

+

+**/

 VOID

 EFIAPI

 AsmIdtVector00 (

   VOID

   );

 

+/**

+  Initializes the pointer to the external interrupt vector table.

+

+  @param  VectorTable  Address of the external interrupt vector table.

+

+**/

 VOID

 EFIAPI

 InitializeExternalVectorTablePtr (

   EFI_CPU_INTERRUPT_HANDLER  *VectorTable

   );

 

+/**

+  Initialize Global Descriptor Table.

+

+**/

 VOID

 InitGlobalDescriptorTable (

   VOID

   );

 

+/**

+  Sets the code selector (CS).

+

+  @param  Selector  Value of code selector.

+

+**/

 VOID

 EFIAPI

 SetCodeSelector (

   UINT16 Selector

   );

 

+/**

+  Sets the data selector (DS).

+

+  @param  Selector  Value of data selector.

+

+**/

 VOID

 EFIAPI

 SetDataSelectors (

diff --git a/UefiCpuPkg/CpuDxe/CpuGdt.c b/UefiCpuPkg/CpuDxe/CpuGdt.c
index 188cdb5..2fe27ad 100644
--- a/UefiCpuPkg/CpuDxe/CpuGdt.c
+++ b/UefiCpuPkg/CpuDxe/CpuGdt.c
@@ -2,7 +2,7 @@
   C based implemention of IA32 interrupt handling only

   requiring a minimal assembly interrupt entry point.

 

-  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -26,14 +26,13 @@
 // Global Descriptor Entry structures

 //

 

-typedef

-struct _GDT_ENTRY {

-  UINT16 limit15_0;

-  UINT16 base15_0;

-  UINT8  base23_16;

-  UINT8  type;

-  UINT8  limit19_16_and_flags;

-  UINT8  base31_24;

+typedef struct _GDT_ENTRY {

+  UINT16 Limit15_0;

+  UINT16 Base15_0;

+  UINT8  Base23_16;

+  UINT8  Type;

+  UINT8  Limit19_16_and_flags;

+  UINT8  Base31_24;

 } GDT_ENTRY;

 

 typedef

@@ -162,11 +161,12 @@ STATIC GDT_ENTRIES GdtTemplate = {
 };

 

 /**

-  Initialize Global Descriptor Table

+  Initialize Global Descriptor Table.

 

 **/

 VOID

 InitGlobalDescriptorTable (

+  VOID

   )

 {

   GDT_ENTRIES *gdt;