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authorHongbin1 Zhang <hongbin1.zhang@intel.com>2024-10-12 09:59:18 +0800
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2024-10-31 13:34:38 +0000
commitaac5b3eca3ea67e2cc9525a742334fb257235fe4 (patch)
tree27ca86d0c6187257510e2d459e645bcaabf067d5 /StdLib/Include/wchar.h
parent79ad703b55a2534ec97b284d38349f6ff6dab8b8 (diff)
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StandaloneMmPkg/MmIpl: Max physical address bits if disable 5 page levelHEADmaster
4-level paging supports translating 48-bit linear addresses to 52-bit physical addresses. Since linear addresses are sign-extended, the linear-address space of 4-level paging is: [0, 2^47-1] and [0xffff8000_00000000, 0xffffffff_ffffffff]. So only [0, 2^47-1] linear-address range maps to the identical physical-address range when 5-Level paging is disabled. Signed-off-by: Hongbin1 Zhang <hongbin1.zhang@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Star Zeng <star.zeng@intel.com> Cc: Jiaxin Wu <jiaxin.wu@intel.com> Cc: Wei6 Xu <wei6.xu@intel.com> Cc: Sami Mujawar <sami.mujawar@arm.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Supreeth Venkatesh <supreeth.venkatesh@arm.com>
Diffstat (limited to 'StdLib/Include/wchar.h')
0 files changed, 0 insertions, 0 deletions