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| author | HoraceX Lien <horacex.lien@intel.com> | 2024-05-27 13:27:15 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-06-07 09:06:49 +0000 |
| commit | 665b223d57369d8b28dcdc81352428adfe435ff4 (patch) | |
| tree | e8007f7dfeab4fae0d840b478d5f85d84d05c355 /ShellPkg | |
| parent | 80b59ff8320d1bd134bf689fe9c0ddf4e0473b88 (diff) | |
| download | edk2-665b223d57369d8b28dcdc81352428adfe435ff4.zip edk2-665b223d57369d8b28dcdc81352428adfe435ff4.tar.gz edk2-665b223d57369d8b28dcdc81352428adfe435ff4.tar.bz2 | |
ShellPkg/Pci.c: Update supported link speed to PCIe Gen6
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4779
Refer to PCI express base specification Reversion 6.2,
table 7-23 Link Capabilities Register.
Supported Link Speeds Vector bit 5: speed 64 GT/s.
Add the support to shell command 'pci'.
Signed-off-by: HoraceX Lien <horacex.lien@intel.com>
Cc: Zhichao Gao <zhichao.gao@intel.com>
Reviewed-by: Zhichao Gao <zhichao.gao@intel.com>
Diffstat (limited to 'ShellPkg')
| -rw-r--r-- | ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c index 7b11f49..9362273 100644 --- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c +++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c @@ -4809,6 +4809,9 @@ ExplainPcieLinkCap ( case 5:
MaxLinkSpeed = L"32.0 GT/s";
break;
+ case 6:
+ MaxLinkSpeed = L"64.0 GT/s";
+ break;
default:
MaxLinkSpeed = L"Reserved";
break;
@@ -5015,6 +5018,9 @@ ExplainPcieLinkStatus ( case 5:
CurLinkSpeed = L"32.0 GT/s";
break;
+ case 6:
+ CurLinkSpeed = L"64.0 GT/s";
+ break;
default:
CurLinkSpeed = L"Reserved";
break;
|