summaryrefslogtreecommitdiff
path: root/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
diff options
context:
space:
mode:
authorjcarsey <jcarsey@6f19259b-4bc3-4df7-8a09-765794883524>2011-04-05 20:55:45 +0000
committerjcarsey <jcarsey@6f19259b-4bc3-4df7-8a09-765794883524>2011-04-05 20:55:45 +0000
commita1d4bfcc3f58a9ed0ce6118556016c7c058d01b1 (patch)
treea27ce55f0ba51146714246b53849e4c9c7fe0d2d /ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
parentc5981e3c3d9afbd6183704937e8c93f6306fc8ca (diff)
downloadedk2-a1d4bfcc3f58a9ed0ce6118556016c7c058d01b1.zip
edk2-a1d4bfcc3f58a9ed0ce6118556016c7c058d01b1.tar.gz
edk2-a1d4bfcc3f58a9ed0ce6118556016c7c058d01b1.tar.bz2
add comments to function declarations and definitions and updated to match coding style document.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11505 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h')
-rw-r--r--ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h20
1 files changed, 11 insertions, 9 deletions
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
index cbc1b02..04a22da 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.h
@@ -100,9 +100,9 @@ typedef enum {
(((PcieDeviceCap) >> 3) & 0x3)
#define PCIE_CAP_EXTENDED_TAG(PcieDeviceCap) \
(((PcieDeviceCap) >> 5) & 0x1)
-#define PCIE_CAP_L0sLatency(PcieDeviceCap) \
+#define PCIE_CAP_L0SLATENCY(PcieDeviceCap) \
(((PcieDeviceCap) >> 6) & 0x7)
-#define PCIE_CAP_L1Latency(PcieDeviceCap) \
+#define PCIE_CAP_L1LATENCY(PcieDeviceCap) \
(((PcieDeviceCap) >> 9) & 0x7)
#define PCIE_CAP_ERR_REPORTING(PcieDeviceCap) \
(((PcieDeviceCap) >> 15) & 0x1)
@@ -163,7 +163,7 @@ typedef enum {
(((PcieLinkCap) >> 4) & 0x3f)
#define PCIE_CAP_ASPM_SUPPORT(PcieLinkCap) \
(((PcieLinkCap) >> 10) & 0x3)
-#define PCIE_CAP_L0s_LATENCY(PcieLinkCap) \
+#define PCIE_CAP_L0S_LATENCY(PcieLinkCap) \
(((PcieLinkCap) >> 12) & 0x7)
#define PCIE_CAP_L1_LATENCY(PcieLinkCap) \
(((PcieLinkCap) >> 15) & 0x7)
@@ -334,7 +334,7 @@ typedef struct {
UINT8 CacheLineSize;
UINT8 PrimaryLatencyTimer;
UINT8 HeaderType;
- UINT8 BIST;
+ UINT8 Bist;
} PCI_COMMON_HEADER;
@@ -427,13 +427,15 @@ typedef struct {
UINT32 Data[46];
} PCI_CARDBUS_DATA;
+typedef union {
+ PCI_DEVICE_HEADER Device;
+ PCI_BRIDGE_HEADER Bridge;
+ PCI_CARDBUS_HEADER CardBus;
+} NON_COMMON_UNION;
+
typedef struct {
PCI_COMMON_HEADER Common;
- union {
- PCI_DEVICE_HEADER Device;
- PCI_BRIDGE_HEADER Bridge;
- PCI_CARDBUS_HEADER CardBus;
- } NonCommon;
+ NON_COMMON_UNION NonCommon;
UINT32 Data[48];
} PCI_CONFIG_SPACE;