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author | Min Xu <min.m.xu@intel.com> | 2021-11-29 10:46:40 +0800 |
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committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2022-04-02 08:15:12 +0000 |
commit | 299c44cd4f53fe7493e7dad283f60e184f90b0b9 (patch) | |
tree | 8af6323ab84e4169199e0781152a7762f92dbf65 /OvmfPkg/LocalApicTimerDxe | |
parent | c2e7be4055cbfa604042dc0edac186a5f234163b (diff) | |
download | edk2-299c44cd4f53fe7493e7dad283f60e184f90b0b9.zip edk2-299c44cd4f53fe7493e7dad283f60e184f90b0b9.tar.gz edk2-299c44cd4f53fe7493e7dad283f60e184f90b0b9.tar.bz2 |
UefiCpuPkg: Setting initial-count register as the last step
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3711
Per SDM, changing the mode of APIC timer (from one-shot to periodic or
vice versa) by writing to the timer LVT entry does not start the timer.
To start the timer, it is necessary to write to the initial-count
register.
If initial-count is wrote before mode change, it's possible that timer
expired before the mode change. Thus failing the periodic mode.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Julien Grall <julien@xen.org>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>
Diffstat (limited to 'OvmfPkg/LocalApicTimerDxe')
0 files changed, 0 insertions, 0 deletions