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| author | Michael Kubacki <michael.kubacki@microsoft.com> | 2021-12-05 14:54:09 -0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-12-07 17:24:28 +0000 |
| commit | ac0a286f4d747a4c6c603a7b225917293cbe1e9f (patch) | |
| tree | 32654f2b35755afc961e2c97296b2dec5762da75 /OvmfPkg/Library/PciHostBridgeLib | |
| parent | d1050b9dff1cace252aff86630bfdb59dff5f507 (diff) | |
| download | edk2-ac0a286f4d747a4c6c603a7b225917293cbe1e9f.zip edk2-ac0a286f4d747a4c6c603a7b225917293cbe1e9f.tar.gz edk2-ac0a286f4d747a4c6c603a7b225917293cbe1e9f.tar.bz2 | |
OvmfPkg: Apply uncrustify changes
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737
Apply uncrustify changes to .c/.h files in the OvmfPkg package
Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Andrew Fish <afish@apple.com>
Diffstat (limited to 'OvmfPkg/Library/PciHostBridgeLib')
| -rw-r--r-- | OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c | 75 |
1 files changed, 36 insertions, 39 deletions
diff --git a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c index 835efff..c36b6f3 100644 --- a/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c +++ b/OvmfPkg/Library/PciHostBridgeLib/PciHostBridgeLib.c @@ -16,8 +16,7 @@ #include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...
#include <Protocol/PciRootBridgeIo.h> // EFI_PCI_ATTRIBUTE_I...
-STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
-
+STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };
/**
Return all the root bridge instances in an array.
@@ -31,59 +30,58 @@ STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 }; PCI_ROOT_BRIDGE *
EFIAPI
PciHostBridgeGetRootBridges (
- UINTN *Count
+ UINTN *Count
)
{
- UINT64 Attributes;
- UINT64 AllocationAttributes;
- PCI_ROOT_BRIDGE_APERTURE Io;
- PCI_ROOT_BRIDGE_APERTURE Mem;
- PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
+ UINT64 Attributes;
+ UINT64 AllocationAttributes;
+ PCI_ROOT_BRIDGE_APERTURE Io;
+ PCI_ROOT_BRIDGE_APERTURE Mem;
+ PCI_ROOT_BRIDGE_APERTURE MemAbove4G;
ZeroMem (&Io, sizeof (Io));
ZeroMem (&Mem, sizeof (Mem));
ZeroMem (&MemAbove4G, sizeof (MemAbove4G));
Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |
- EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
- EFI_PCI_ATTRIBUTE_ISA_IO_16 |
- EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
- EFI_PCI_ATTRIBUTE_VGA_MEMORY |
- EFI_PCI_ATTRIBUTE_VGA_IO_16 |
- EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
+ EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |
+ EFI_PCI_ATTRIBUTE_ISA_IO_16 |
+ EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |
+ EFI_PCI_ATTRIBUTE_VGA_MEMORY |
+ EFI_PCI_ATTRIBUTE_VGA_IO_16 |
+ EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;
AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;
if (PcdGet64 (PcdPciMmio64Size) > 0) {
AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;
- MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
- MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
- PcdGet64 (PcdPciMmio64Size) - 1;
+ MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);
+ MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +
+ PcdGet64 (PcdPciMmio64Size) - 1;
} else {
CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));
}
- Io.Base = PcdGet64 (PcdPciIoBase);
- Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
- Mem.Base = PcdGet64 (PcdPciMmio32Base);
+ Io.Base = PcdGet64 (PcdPciIoBase);
+ Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);
+ Mem.Base = PcdGet64 (PcdPciMmio32Base);
Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);
return PciHostBridgeUtilityGetRootBridges (
- Count,
- Attributes,
- AllocationAttributes,
- FALSE,
- PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
- 0,
- PCI_MAX_BUS,
- &Io,
- &Mem,
- &MemAbove4G,
- &mNonExistAperture,
- &mNonExistAperture
- );
+ Count,
+ Attributes,
+ AllocationAttributes,
+ FALSE,
+ PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,
+ 0,
+ PCI_MAX_BUS,
+ &Io,
+ &Mem,
+ &MemAbove4G,
+ &mNonExistAperture,
+ &mNonExistAperture
+ );
}
-
/**
Free the root bridge instances array returned from
PciHostBridgeGetRootBridges().
@@ -94,14 +92,13 @@ PciHostBridgeGetRootBridges ( VOID
EFIAPI
PciHostBridgeFreeRootBridges (
- PCI_ROOT_BRIDGE *Bridges,
- UINTN Count
+ PCI_ROOT_BRIDGE *Bridges,
+ UINTN Count
)
{
PciHostBridgeUtilityFreeRootBridges (Bridges, Count);
}
-
/**
Inform the platform that the resource conflict happens.
@@ -119,8 +116,8 @@ PciHostBridgeFreeRootBridges ( VOID
EFIAPI
PciHostBridgeResourceConflict (
- EFI_HANDLE HostBridgeHandle,
- VOID *Configuration
+ EFI_HANDLE HostBridgeHandle,
+ VOID *Configuration
)
{
PciHostBridgeUtilityResourceConflict (Configuration);
|