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author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-06-30 15:57:33 +0000 |
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committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-06-30 15:57:33 +0000 |
commit | 85f8bc32d4e358670b946327a7cb03594ba34938 (patch) | |
tree | c808d71fd1d5b7af99f6b5c5f44fb7b5d7c452b3 /OptionRomPkg | |
parent | 8c5c1f32a53a25292df49f673bc61586809ae21f (diff) | |
download | edk2-85f8bc32d4e358670b946327a7cb03594ba34938.zip edk2-85f8bc32d4e358670b946327a7cb03594ba34938.tar.gz edk2-85f8bc32d4e358670b946327a7cb03594ba34938.tar.bz2 |
Do not update the GL-GD5446 DRAM Control register during
InitializeGraphicsMode. The update of this register would
cause the xorg-cirrus driver to mis-detect the size of
video memory for the QEMU cirrus video device.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8690 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OptionRomPkg')
-rw-r--r-- | OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c | 22 |
1 files changed, 19 insertions, 3 deletions
diff --git a/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c b/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c index a248847..8b01f8c 100644 --- a/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c +++ b/OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430.c @@ -770,6 +770,20 @@ InitializeGraphicsMode ( {
UINT8 Byte;
UINTN Index;
+ UINT16 DeviceId;
+
+ //
+ // Read the PCI Configuration Header from the PCI Device
+ //
+ ASSERT_EFI_ERROR (
+ Private->PciIo->Pci.Read (
+ Private->PciIo,
+ EfiPciIoWidthUint16,
+ PCI_DEVICE_ID_OFFSET,
+ 1,
+ &DeviceId
+ )
+ );
outw (Private, SEQ_ADDRESS_REGISTER, 0x1206);
outw (Private, SEQ_ADDRESS_REGISTER, 0x0012);
@@ -778,9 +792,11 @@ InitializeGraphicsMode ( outw (Private, SEQ_ADDRESS_REGISTER, ModeData->SeqSettings[Index]);
}
- outb (Private, SEQ_ADDRESS_REGISTER, 0x0f);
- Byte = (UINT8) ((inb (Private, SEQ_DATA_REGISTER) & 0xc7) ^ 0x30);
- outb (Private, SEQ_DATA_REGISTER, Byte);
+ if (DeviceId != CIRRUS_LOGIC_5446_DEVICE_ID) {
+ outb (Private, SEQ_ADDRESS_REGISTER, 0x0f);
+ Byte = (UINT8) ((inb (Private, SEQ_DATA_REGISTER) & 0xc7) ^ 0x30);
+ outb (Private, SEQ_DATA_REGISTER, Byte);
+ }
outb (Private, MISC_OUTPUT_REGISTER, ModeData->MiscSetting);
outw (Private, GRAPH_ADDRESS_REGISTER, 0x0506);
|