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authorJordan Justen <jordan.l.justen@intel.com>2016-05-30 18:51:55 -0700
committerLiming Gao <liming.gao@intel.com>2016-06-28 09:48:46 +0800
commit7905d234bc05424f9cf5d1643bf6f08bf3264125 (patch)
tree36198ae6ee92a3c729a9dc778d1f012abe71179b /MdePkg/Library/BaseLib/Ia32
parent72ed2edeffbd0d01a915da6f31ead93306216286 (diff)
downloadedk2-7905d234bc05424f9cf5d1643bf6f08bf3264125.zip
edk2-7905d234bc05424f9cf5d1643bf6f08bf3264125.tar.gz
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MdePkg BaseLib: Convert Ia32/RRotU64.asm to NASM
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert Ia32/RRotU64.asm to Ia32/RRotU64.nasm Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Diffstat (limited to 'MdePkg/Library/BaseLib/Ia32')
-rw-r--r--MdePkg/Library/BaseLib/Ia32/RRotU64.nasm50
1 files changed, 50 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm b/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm
new file mode 100644
index 0000000..8110202
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.nasm
@@ -0,0 +1,50 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; RRotU64.nasm
+;
+; Abstract:
+;
+; 64-bit right rotation for Ia32
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalMathRRotU64 (
+; IN UINT64 Operand,
+; IN UINTN Count
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(InternalMathRRotU64)
+ASM_PFX(InternalMathRRotU64):
+ push ebx
+ mov cl, [esp + 16]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ shrd ebx, eax, cl
+ shrd eax, edx, cl
+ rol ebx, cl
+ shrd edx, ebx, cl
+ test cl, 32 ; Count >= 32?
+ jz .0
+ mov ecx, eax ; switch eax & edx if Count >= 32
+ mov eax, edx
+ mov edx, ecx
+.0:
+ pop ebx
+ ret
+