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authorjyao1 <jyao1@6f19259b-4bc3-4df7-8a09-765794883524>2011-09-21 03:45:35 +0000
committerjyao1 <jyao1@6f19259b-4bc3-4df7-8a09-765794883524>2011-09-21 03:45:35 +0000
commit378175d2584ab0d52922308f6a18e710a36152ef (patch)
treeefa351a1097b3363614fc5ff84b16597edf24d92 /MdeModulePkg
parent125887e7e8a8ad0ed40225ffef5db722491b85a5 (diff)
downloadedk2-378175d2584ab0d52922308f6a18e710a36152ef.zip
edk2-378175d2584ab0d52922308f6a18e710a36152ef.tar.gz
edk2-378175d2584ab0d52922308f6a18e710a36152ef.tar.bz2
Add PCD for 1G page table
signed off by: jyao1 reviewed by: jfan12 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12397 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg')
-rw-r--r--MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf3
-rw-r--r--MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c12
-rw-r--r--MdeModulePkg/MdeModulePkg.dec4
-rw-r--r--MdeModulePkg/Universal/CapsulePei/CapsulePei.inf3
-rw-r--r--MdeModulePkg/Universal/CapsulePei/UefiCapsule.c12
5 files changed, 24 insertions, 10 deletions
diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
index 784fdf1..7717d0a 100644
--- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
@@ -96,6 +96,9 @@
[FeaturePcd]
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress
+[Pcd.IA32,Pcd.X64]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable
+
[Depex]
gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiLoadFilePpiGuid AND gEfiPeiMasterBootModePpiGuid
diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
index e3ed4b6..795ae70 100644
--- a/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c
@@ -66,11 +66,13 @@ CreateIdentityMappingPageTables (
PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
Page1GSupport = FALSE;
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000001) {
- AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
- if ((RegEdx & BIT26) != 0) {
- Page1GSupport = TRUE;
+ if (PcdGetBool(PcdUse1GPageTable)) {
+ AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
+ if (RegEax >= 0x80000001) {
+ AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
+ if ((RegEdx & BIT26) != 0) {
+ Page1GSupport = TRUE;
+ }
}
}
diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec
index f9a19f9..2b05446 100644
--- a/MdeModulePkg/MdeModulePkg.dec
+++ b/MdeModulePkg/MdeModulePkg.dec
@@ -804,3 +804,7 @@
# default value is set to Zero. And the PCD is assumed ONLY to be accessed in DxeS3BootScriptLib Library.
gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0|UINT64|0x00030000
+[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx, PcdsDynamicHii]
+ ## This PCD specifies whether 1G page table is enabled.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable|FALSE|BOOLEAN|0x30000047
+
diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
index 72f1ba5..8f9ebfb 100644
--- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
+++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
@@ -68,6 +68,9 @@
[Pcd.IA32]
gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleCoalesceFile
+[Pcd.IA32]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable
+
[FeaturePcd.IA32]
gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode
diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
index d34c3fd..98b0d56 100644
--- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
+++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c
@@ -63,11 +63,13 @@ CalculatePageTableSize (
BOOLEAN Page1GSupport;
Page1GSupport = FALSE;
- AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
- if (RegEax >= 0x80000001) {
- AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
- if ((RegEdx & BIT26) != 0) {
- Page1GSupport = TRUE;
+ if (PcdGetBool(PcdUse1GPageTable)) {
+ AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
+ if (RegEax >= 0x80000001) {
+ AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
+ if ((RegEdx & BIT26) != 0) {
+ Page1GSupport = TRUE;
+ }
}
}