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| author | Zhichao Gao <zhichao.gao@intel.com> | 2019-03-22 11:07:17 +0800 |
|---|---|---|
| committer | Liming Gao <liming.gao@intel.com> | 2019-04-02 12:49:03 +0800 |
| commit | a89fd3a359b868e619355dbeda14ac4104b467a6 (patch) | |
| tree | 6cfa7033d791dd889bcf0d69ee113541b2319f82 /MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c | |
| parent | b02873340b2de5c2fe8325d22214cd3a5b21c5e5 (diff) | |
| download | edk2-a89fd3a359b868e619355dbeda14ac4104b467a6.zip edk2-a89fd3a359b868e619355dbeda14ac4104b467a6.tar.gz edk2-a89fd3a359b868e619355dbeda14ac4104b467a6.tar.bz2 | |
MdeModulePkg/CapsuleRuntimeDxe: Add cache flush for IA32 and X64
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1462
The IA32 and X64 ARCH need cache flush function during capsule update.
And the cache flush is already implemented in arm ARCH, so add this
function CapsuleCacheWriteBack() to IA32 and X64 ARCH. And add a null
version for EBC.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Zhichao Gao <zhichao.gao@intel.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Hao Wu <hao.a.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Diffstat (limited to 'MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c')
| -rw-r--r-- | MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c new file mode 100644 index 0000000..ab81296 --- /dev/null +++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleCache.c @@ -0,0 +1,63 @@ +/** @file
+ Flush the cache is required for most architectures while do capsule
+ update. It is not support at Runtime.
+
+ Copyright (c) 2018, Linaro, Ltd. All rights reserved.<BR>
+ Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials are licensed and made available
+ under the terms and conditions of the BSD License which accompanies this
+ distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "CapsuleService.h"
+
+#include <Library/CacheMaintenanceLib.h>
+
+/**
+ Writes Back a range of data cache lines covering a set of capsules in memory.
+
+ Writes Back the data cache lines specified by ScatterGatherList.
+
+ @param ScatterGatherList Physical address of the data structure that
+ describes a set of capsules in memory
+
+**/
+VOID
+CapsuleCacheWriteBack (
+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList
+ )
+{
+ EFI_CAPSULE_BLOCK_DESCRIPTOR *Desc;
+
+ if (!EfiAtRuntime ()) {
+ Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)ScatterGatherList;
+ do {
+ WriteBackDataCacheRange (
+ (VOID *)(UINTN)Desc,
+ (UINTN)sizeof (*Desc)
+ );
+
+ if (Desc->Length > 0) {
+ WriteBackDataCacheRange (
+ (VOID *)(UINTN)Desc->Union.DataBlock,
+ (UINTN)Desc->Length
+ );
+ Desc++;
+ } else if (Desc->Union.ContinuationPointer > 0) {
+ Desc = (EFI_CAPSULE_BLOCK_DESCRIPTOR *)(UINTN)Desc->Union.ContinuationPointer;
+ }
+ } while (Desc->Length > 0 || Desc->Union.ContinuationPointer > 0);
+
+ WriteBackDataCacheRange (
+ (VOID *)(UINTN)Desc,
+ (UINTN)sizeof (*Desc)
+ );
+ }
+}
+
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