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| author | eric_tian <eric_tian@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-09-30 03:00:36 +0000 |
|---|---|---|
| committer | eric_tian <eric_tian@6f19259b-4bc3-4df7-8a09-765794883524> | 2009-09-30 03:00:36 +0000 |
| commit | db731882fa90d1311a0828b2fbf13f766d8c21b6 (patch) | |
| tree | 328d9d868abd1f75090513674326419ec945d07f /MdeModulePkg/Bus | |
| parent | 4009f916883c0cb6467629d3eccaa3d95d5b27f8 (diff) | |
| download | edk2-db731882fa90d1311a0828b2fbf13f766d8c21b6.zip edk2-db731882fa90d1311a0828b2fbf13f766d8c21b6.tar.gz edk2-db731882fa90d1311a0828b2fbf13f766d8c21b6.tar.bz2 | |
For the data region which will be touched by Pci Bus Master, we should allocate memory by PciIo.AllocateBuffer() but not AllocatePool() base library API. So the memory region can be used to map into Pci controller-specific address thru PciIo.Map().
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9323 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus')
| -rw-r--r-- | MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c | 2 | ||||
| -rw-r--r-- | MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c index c57b0c8..1ed7902 100644 --- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c +++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c @@ -1001,7 +1001,7 @@ Uhci2AsyncInterruptTransfer ( //
// Allocate and map source data buffer for bus master access.
//
- DataPtr = AllocatePool (DataLength);
+ DataPtr = UsbHcAllocateMem (Uhc->MemPool, DataLength);
if (DataPtr == NULL) {
return EFI_OUT_OF_RESOURCES;
diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c index f56fa2b..759f7a0 100644 --- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c +++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c @@ -798,7 +798,7 @@ UhciFreeAsyncReq ( }
if (AsyncReq->Data != NULL) {
- gBS->FreePool (AsyncReq->Data);
+ UsbHcFreeMem (Uhc->MemPool, AsyncReq->Data, AsyncReq->DataLen);
}
gBS->FreePool (AsyncReq);
|