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| author | Chris Ruffin <chris.ruffin@intel.com> | 2014-12-18 06:13:36 +0000 |
|---|---|---|
| committer | erictian <erictian@Edk2> | 2014-12-18 06:13:36 +0000 |
| commit | 6a497016c9f6aa60e9be330d1592f8b5e71156ef (patch) | |
| tree | 2ab5f07311df80fab77b11d4c7c5f51db8ebf3a7 /MdeModulePkg/Bus/Ata | |
| parent | 07f986f134abf85b4b1f360ca3c86f22cd9f92da (diff) | |
| download | edk2-6a497016c9f6aa60e9be330d1592f8b5e71156ef.zip edk2-6a497016c9f6aa60e9be330d1592f8b5e71156ef.tar.gz edk2-6a497016c9f6aa60e9be330d1592f8b5e71156ef.tar.bz2 | |
MdeModulePkg\Bus\Ata\AtaAtapiPassThru: don't set PxSACT bit when issuing command
Setting a bit in the PxSACT register for a command in the command list indicates
to the controller that the command list slot contains a native queued command (NCQ).
This can cause problems with some controllers (one such controller is the Marvell 9128).
Since NCQ commands are not used, don't set the PxACT register for commands issued.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chris Ruffin <chris.ruffin@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16536 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Bus/Ata')
| -rw-r--r-- | MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c index 186d40c..4d1b584 100644 --- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c +++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c @@ -1340,10 +1340,6 @@ AhciStartCommand ( //
// Setting the command
//
- Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SACT;
- AhciAndReg (PciIo, Offset, 0);
- AhciOrReg (PciIo, Offset, CmdSlotBit);
-
Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_CI;
AhciAndReg (PciIo, Offset, 0);
AhciOrReg (PciIo, Offset, CmdSlotBit);
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