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authorYarlagadda, Satya P <satya.p.yarlagadda@intel.com>2016-07-26 09:14:17 +0800
committerJiewen Yao <jiewen.yao@intel.com>2016-07-27 09:08:43 +0800
commit4c53eb72d539f5ca61f949235014f7e43f0e6354 (patch)
tree818f02a03e60c1189843f0c965c28267be928ef8 /IntelFsp2Pkg
parentae5cc3c30301aebb59e817c09762dc6ec8009621 (diff)
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IntelFsp2Pkg: Skip loading Microcode if MicrocodeCodeSize is zero
During asm to Nasm conversion, we missed the code to skip loading the microcode and return success if the size is zero. Added additional check to report error if the microcode size is not zero but less than 2 kB. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Satya Yarlagadda <satya.p.yarlagadda@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'IntelFsp2Pkg')
-rw-r--r--IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm10
1 files changed, 9 insertions, 1 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
index 55ee85a..6e86023 100644
--- a/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/FspApiEntryT.nasm
@@ -172,7 +172,15 @@ ASM_PFX(LoadMicrocodeDefault):
cmp eax, 0
jz ParamError
mov esp, eax
-
+
+ ; skip loading Microcode if the MicrocodeCodeSize is zero
+ ; and report error if size is less than 2k
+ mov eax, dword [esp + LoadMicrocodeParams.MicrocodeCodeSize]
+ cmp eax, 0
+ jz Exit2
+ cmp eax, 0800h
+ jl ParamError
+
mov esi, dword [esp + LoadMicrocodeParams.MicrocodeCodeAddr]
cmp esi, 0
jnz CheckMainHeader