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author | Chasel, Chiu <chasel.chiu@intel.com> | 2018-10-11 21:22:12 +0800 |
---|---|---|
committer | Chasel, Chiu <chasel.chiu@intel.com> | 2018-10-19 15:01:00 +0800 |
commit | a2e61f341d26a78751b2f19b5004c6bbfc8b4fa9 (patch) | |
tree | e8083c1a1b5a396a7b0d5239dc0f2f1f491313a5 /IntelFsp2Pkg/FspSecCore | |
parent | 7b500c606ad101fad52327318af37889048cd45e (diff) | |
download | edk2-a2e61f341d26a78751b2f19b5004c6bbfc8b4fa9.zip edk2-a2e61f341d26a78751b2f19b5004c6bbfc8b4fa9.tar.gz edk2-a2e61f341d26a78751b2f19b5004c6bbfc8b4fa9.tar.bz2 |
IntelFsp2Pkg: Support FSP Dispatch mode
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1241
Add support for both API (original mode) and DISPATCH mode:
1. Add FspMode field from reserved byte of Global
Data Structure to tell which mode is selected by boot
loader. If boot loader invoking FSP-M API this field
will remain as default 0 (API mode), otherwise platform
FSP should set this field to 1 (Dispatch mode) when
initializing Global Data Structure.
2. gFspInApiModePpiGuid will be instaled when FSP running in API
mode and modules only for API mode should have this in depex.
3. If it is DISPATCH mode, FSP will return to PEI dispatcher,
not directly return to boot loader.
4. DISPATCH mode supports DXE NotifyPhase drivers so FSP
will not wait for PEI NotifyPhase callbacks, instead it
will install gFspReadyForNotifyPhasePpiGuid PPI for
platform to complete late initialization before transferring
to DXE.
Test: Verified FSP API and DISPATCH modes on 2 internal
platforms and both boot successfully.
Cc: Jiewen Yao <Jiewen.yao@intel.com>
Cc: Desimone Nathaniel L <nathaniel.l.desimone@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/FspSecCore')
-rw-r--r-- | IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 2 | ||||
-rw-r--r-- | IntelFsp2Pkg/FspSecCore/SecMain.c | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf index c657862..c61af10 100644 --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf @@ -65,4 +65,4 @@ [Ppis]
gEfiTemporaryRamSupportPpiGuid ## PRODUCES
-
+ gFspInApiModePpiGuid ## PRODUCES
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c index 5a43ba1..37fd4df 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -20,6 +20,11 @@ EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = { EFI_PEI_PPI_DESCRIPTOR mPeiSecPlatformInformationPpi[] = {
{
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gFspInApiModePpiGuid,
+ NULL
+ },
+ {
(EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
&gEfiTemporaryRamSupportPpiGuid,
&gSecTemporaryRamSupportPpi
|