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author | Chasel Chiu <chasel.chiu@intel.com> | 2021-01-05 16:55:25 +0800 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2021-01-07 02:35:50 +0000 |
commit | 379e5098a4836b21b893b4801baa34b570c24599 (patch) | |
tree | d91ba10ce13d2443be6eb0ebee0ee6d6b164ae9d /IntelFsp2Pkg/FspSecCore | |
parent | 7785b38ac9772d55b6d1e8560dde3f854e1dd34a (diff) | |
download | edk2-379e5098a4836b21b893b4801baa34b570c24599.zip edk2-379e5098a4836b21b893b4801baa34b570c24599.tar.gz edk2-379e5098a4836b21b893b4801baa34b570c24599.tar.bz2 |
IntelFsp2Pkg: Support FSP private temporary memory.
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3153
In FSP the temporary memory provided by bootloader typically will be
totally given to PeiCore as Heap, but in some cases FSP may have to
reserve some more temporary memory for private usage.
This commit adds this flexibility for FSP to reserve some
temporary memory before giving them to PeiCore.
Cc: Maurice Ma <maurice.ma@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Diffstat (limited to 'IntelFsp2Pkg/FspSecCore')
-rw-r--r-- | IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf | 3 | ||||
-rw-r--r-- | IntelFsp2Pkg/FspSecCore/SecMain.c | 11 |
2 files changed, 9 insertions, 5 deletions
diff --git a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf index 61b7ddc..7b05cae 100644 --- a/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf +++ b/IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf @@ -1,7 +1,7 @@ ## @file
# Sec Core for FSP
#
-# Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -59,6 +59,7 @@ gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage ## CONSUMES
gIntelFsp2PkgTokenSpaceGuid.PcdFspMaxInterruptSupported ## CONSUMES
+ gIntelFsp2PkgTokenSpaceGuid.PcdFspPrivateTemporaryRamSize ## CONSUMES
[Ppis]
gEfiTemporaryRamSupportPpiGuid ## PRODUCES
diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.c b/IntelFsp2Pkg/FspSecCore/SecMain.c index c8de52e..5405711 100644 --- a/IntelFsp2Pkg/FspSecCore/SecMain.c +++ b/IntelFsp2Pkg/FspSecCore/SecMain.c @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@@ -150,15 +150,18 @@ SecStartup ( SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;
SecCoreData.BootFirmwareVolumeSize = (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)->FvLength;
- SecCoreData.TemporaryRamBase = (VOID*)(UINTN) TempRamBase;
+ //
+ // Support FSP reserved temporary memory from the whole temporary memory provided by bootloader.
+ // FSP reserved temporary memory will not be given to PeiCore.
+ //
+ SecCoreData.TemporaryRamBase = (UINT8 *)(UINTN) TempRamBase + PcdGet32 (PcdFspPrivateTemporaryRamSize);
+ SecCoreData.TemporaryRamSize = SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize);
if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
- SecCoreData.TemporaryRamSize = SizeOfRam; // stack size that is going to be copied to the permanent memory
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize;
SecCoreData.StackBase = (VOID *)GetFspEntryStack(); // Share the same boot loader stack
SecCoreData.StackSize = 0;
} else {
- SecCoreData.TemporaryRamSize = SizeOfRam;
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
SecCoreData.StackBase = (VOID*)(UINTN)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize);
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