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author | Gao, Liming <liming.gao@intel.com> | 2014-01-16 02:42:17 +0000 |
---|---|---|
committer | lgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-01-16 02:42:17 +0000 |
commit | 95c2e69ad6a6dcd74c0964404fd7e037be7391a4 (patch) | |
tree | eb7c43397af9270847a0fa5d1ea32dfd41ee6e8d /EmulatorPkg | |
parent | b9ababa39d90959c48348198f8fddab210fb89c2 (diff) | |
download | edk2-95c2e69ad6a6dcd74c0964404fd7e037be7391a4.zip edk2-95c2e69ad6a6dcd74c0964404fd7e037be7391a4.tar.gz edk2-95c2e69ad6a6dcd74c0964404fd7e037be7391a4.tar.bz2 |
Update PeiServicesTablePointerLib instance to add new API MigratePeiServicesTablePointer
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-By: Andrew Fish <afish@apple.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15128 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'EmulatorPkg')
3 files changed, 78 insertions, 0 deletions
diff --git a/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c index 10f5888..06f995b 100644 --- a/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c +++ b/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c @@ -88,4 +88,30 @@ PeiServicesTablePointerLibConstructor ( return EFI_SUCCESS;
}
+/**
+ Perform CPU specific actions required to migrate the PEI Services Table
+ pointer from temporary RAM to permanent RAM.
+
+ For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+ a dedicated CPU register. This means that there is no memory storage
+ associated with storing the PEI Services Table pointer, so no additional
+ migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+ VOID
+ )
+{
+ //
+ // PEI Services Table pointer is cached in the global variable. No additional
+ // migration actions are required.
+ //
+ return;
+}
diff --git a/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c index c349978..5aaf296 100644 --- a/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c +++ b/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c @@ -133,4 +133,30 @@ PeiServicesTablePointerLibConstructor ( return Status;
}
+/**
+ Perform CPU specific actions required to migrate the PEI Services Table
+ pointer from temporary RAM to permanent RAM.
+
+ For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+ a dedicated CPU register. This means that there is no memory storage
+ associated with storing the PEI Services Table pointer, so no additional
+ migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+ VOID
+ )
+{
+ //
+ // PEI Services Table pointer is cached in the global variable. No additional
+ // migration actions are required.
+ //
+ return;
+}
diff --git a/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c index 38ec0ea..fa04ed3 100644 --- a/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c +++ b/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c @@ -71,5 +71,31 @@ GetPeiServicesTablePointer ( return PeiServicesTablePointer;
}
+/**
+ Perform CPU specific actions required to migrate the PEI Services Table
+ pointer from temporary RAM to permanent RAM.
+
+ For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+ a dedicated CPU register. This means that there is no memory storage
+ associated with storing the PEI Services Table pointer, so no additional
+ migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+ VOID
+ )
+{
+ //
+ // PEI Services Table pointer is cached in SRAM. No additional
+ // migration actions are required.
+ //
+ return;
+}
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