diff options
| author | bbahnsen <bbahnsen@6f19259b-4bc3-4df7-8a09-765794883524> | 2006-04-21 22:54:32 +0000 |
|---|---|---|
| committer | bbahnsen <bbahnsen@6f19259b-4bc3-4df7-8a09-765794883524> | 2006-04-21 22:54:32 +0000 |
| commit | 878ddf1fc3540a715f63594ed22b6929e881afb4 (patch) | |
| tree | c56c44dac138137b510e1fba7c3efe5e4d84bea2 /EdkModulePkg/Universal/DebugSupport/Dxe | |
| download | edk2-878ddf1fc3540a715f63594ed22b6929e881afb4.zip edk2-878ddf1fc3540a715f63594ed22b6929e881afb4.tar.gz edk2-878ddf1fc3540a715f63594ed22b6929e881afb4.tar.bz2 | |
Initial import.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'EdkModulePkg/Universal/DebugSupport/Dxe')
12 files changed, 3766 insertions, 0 deletions
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.c b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.c new file mode 100644 index 0000000..118e9b7 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.c @@ -0,0 +1,151 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ DebugSupport.c
+
+Abstract:
+
+ Top level C file for debug support driver. Contains initialization function.
+
+Revision History
+
+--*/
+
+//
+// private header files
+//
+#include "plDebugSupport.h"
+
+//
+// This is a global that is the actual interface
+//
+EFI_DEBUG_SUPPORT_PROTOCOL gDebugSupportProtocolInterface = {
+ EFI_ISA,
+ GetMaximumProcessorIndex,
+ RegisterPeriodicCallback,
+ RegisterExceptionCallback,
+ InvalidateInstructionCache
+};
+
+//
+// Driver Entry Point
+//
+EFI_STATUS
+InitializeDebugSupportDriver (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+/*++
+
+Routine Description:
+ Driver entry point. Checks to see there's not already a DebugSupport protocol
+ installed for the selected processor before installing protocol.
+
+Arguments:
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+
+Returns:
+
+ EFI_STATUS
+
+--*/
+// TODO: ImageHandle - add argument and description to function comment
+// TODO: SystemTable - add argument and description to function comment
+{
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImageProtocolPtr;
+ EFI_STATUS Status;
+ EFI_HANDLE Handle;
+ EFI_HANDLE *HandlePtr;
+ UINTN NumHandles;
+ EFI_DEBUG_SUPPORT_PROTOCOL *DebugSupportProtocolPtr;
+
+ //
+ // Install Protocol Interface...
+ //
+ // First check to see that the debug support protocol for this processor
+ // type is not already installed
+ //
+ Status = gBS->LocateHandleBuffer (
+ ByProtocol,
+ &gEfiDebugSupportProtocolGuid,
+ NULL,
+ &NumHandles,
+ &HandlePtr
+ );
+
+ if (Status != EFI_NOT_FOUND) {
+ do {
+ NumHandles--;
+ Status = gBS->OpenProtocol (
+ HandlePtr[NumHandles],
+ &gEfiDebugSupportProtocolGuid,
+ (VOID **) &DebugSupportProtocolPtr,
+ ImageHandle,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
+ if (Status == EFI_SUCCESS && DebugSupportProtocolPtr->Isa == EFI_ISA) {
+ gBS->FreePool (HandlePtr);
+ Status = EFI_ALREADY_STARTED;
+ goto ErrExit;
+ }
+ } while (NumHandles > 0);
+ gBS->FreePool (HandlePtr);
+ }
+
+ //
+ // Get our image information and install platform specific unload handler
+ //
+ Status = gBS->OpenProtocol (
+ ImageHandle,
+ &gEfiLoadedImageProtocolGuid,
+ (VOID **) &LoadedImageProtocolPtr,
+ ImageHandle,
+ NULL,
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL
+ );
+ ASSERT (!EFI_ERROR (Status));
+ if (Status != EFI_SUCCESS) {
+ goto ErrExit;
+ }
+
+ LoadedImageProtocolPtr->Unload = plUnloadDebugSupportDriver;
+
+ //
+ // Call hook for platform specific initialization
+ //
+ Status = plInitializeDebugSupportDriver ();
+ ASSERT (!EFI_ERROR (Status));
+ if (Status != EFI_SUCCESS) {
+ goto ErrExit;
+ }
+
+ //
+ // Install DebugSupport protocol to new handle
+ //
+ Handle = NULL;
+ Status = gBS->InstallProtocolInterface (
+ &Handle,
+ &gEfiDebugSupportProtocolGuid,
+ EFI_NATIVE_INTERFACE,
+ &gDebugSupportProtocolInterface
+ );
+ ASSERT (!EFI_ERROR (Status));
+ if (Status != EFI_SUCCESS) {
+ goto ErrExit;
+ }
+
+ErrExit:
+ return Status;
+}
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.dxs b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.dxs new file mode 100644 index 0000000..34f680a --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.dxs @@ -0,0 +1,26 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ DebugSupport.dxs
+
+Abstract:
+
+ Dependency expression source file.
+
+--*/
+#include <AutoGen.h>
+#include <DxeDepex.h>
+
+DEPENDENCY_START
+ TRUE
+DEPENDENCY_END
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.mbd b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.mbd new file mode 100644 index 0000000..a38bf30 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.mbd @@ -0,0 +1,42 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<ModuleBuildDescription xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MbdHeader>
+ <BaseName>DebugSupport</BaseName>
+ <Guid>911D584C-35F7-4955-BEF9-B452769DDC3A</Guid>
+ <Version>0</Version>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Created>2006-03-12 17:09</Created>
+ <Modified>2006-03-19 15:19</Modified>
+ </MbdHeader>
+ <Libraries>
+ <Library>UefiBootServicesTableLib</Library>
+ <Library>BaseLib</Library>
+ <Library>UefiMemoryLib</Library>
+ <Library>UefiDriverEntryPoint</Library>
+ <Library>DxeReportStatusCodeLib</Library>
+ <Library>BaseDebugLibReportStatusCode</Library>
+ <Library>DxeMemoryAllocationLib</Library>
+ </Libraries>
+ <BuildOptions ToolChain="MSFT">
+ <ImageEntryPoint>_ModuleEntryPoint</ImageEntryPoint>
+ </BuildOptions>
+</ModuleBuildDescription>
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.msa b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.msa new file mode 100644 index 0000000..3cf5e12 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/DebugSupport.msa @@ -0,0 +1,68 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!--
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+-->
+<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.TianoCore.org/2006/Edk2.0 http://www.TianoCore.org/2006/Edk2.0/SurfaceArea.xsd">
+ <MsaHeader>
+ <BaseName>DebugSupport</BaseName>
+ <ModuleType>DXE_DRIVER</ModuleType>
+ <ComponentType>BS_DRIVER</ComponentType>
+ <Guid>911D584C-35F7-4955-BEF9-B452769DDC3A</Guid>
+ <Version>0</Version>
+ <Abstract>Component description file for DiskIo module.</Abstract>
+ <Description>FIX ME!</Description>
+ <Copyright>Copyright (c) 2004-2006, Intel Corporation</Copyright>
+ <License>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ </License>
+ <Specification>0</Specification>
+ <Created>2006-03-12 17:09</Created>
+ <Updated>2006-03-19 15:19</Updated>
+ </MsaHeader>
+ <LibraryClassDefinitions>
+ <LibraryClass Usage="ALWAYS_CONSUMED">DebugLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiDriverEntryPoint</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">BaseMemoryLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">MemoryAllocationLib</LibraryClass>
+ <LibraryClass Usage="ALWAYS_CONSUMED">UefiBootServicesTableLib</LibraryClass>
+ </LibraryClassDefinitions>
+ <SourceFiles>
+ <Filename>DebugSupport.c</Filename>
+ <Filename>DebugSupport.dxs</Filename>
+ <Arch ArchType="IA32">
+ <Filename>ia32\AsmFuncs.asm</Filename>
+ <Filename>ia32\plDebugSupport.c</Filename>
+ </Arch>
+ <Arch ArchType="IPF">
+ <Filename>ipf\AsmFuncs.s</Filename>
+ <Filename>ipf\common.i</Filename>
+ <Filename>ipf\ds64macros.i</Filename>
+ <Filename>ipf\plDebugSupport.c</Filename>
+ </Arch>
+ </SourceFiles>
+ <Includes>
+ <PackageName>MdePkg</PackageName>
+ <PackageName>EdkModulePkg</PackageName>
+ </Includes>
+ <Protocols>
+ <Protocol Usage="SOMETIMES_PRODUCED">DebugSupport</Protocol>
+ <Protocol Usage="ALWAYS_CONSUMED">LoadedImage</Protocol>
+ </Protocols>
+ <Externs>
+ <Extern>
+ <ModuleEntryPoint>InitializeDebugSupportDriver</ModuleEntryPoint>
+ </Extern>
+ </Externs>
+</ModuleSurfaceArea>
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/build.xml b/EdkModulePkg/Universal/DebugSupport/Dxe/build.xml new file mode 100644 index 0000000..b879fc0 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/build.xml @@ -0,0 +1,47 @@ +<?xml version="1.0" encoding="UTF-8"?><!-- Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.-->
+<project basedir="." default="DebugSupport"><!--Apply external ANT tasks-->
+ <taskdef resource="GenBuild.tasks"/>
+ <taskdef resource="net/sf/antcontrib/antlib.xml"/>
+ <property environment="env"/>
+ <property name="WORKSPACE_DIR" value="${env.WORKSPACE}"/>
+ <import file="${WORKSPACE_DIR}\Tools\Conf\BuildMacro.xml"/><!--MODULE_RELATIVE PATH is relative to PACKAGE_DIR-->
+ <property name="MODULE_RELATIVE_PATH" value="Universal\DebugSupport\Dxe"/>
+ <property name="MODULE_DIR" value="${PACKAGE_DIR}\${MODULE_RELATIVE_PATH}"/>
+ <property name="COMMON_FILE" value="${WORKSPACE_DIR}\Tools\Conf\Common.xml"/>
+ <target name="DebugSupport">
+ <GenBuild baseName="DebugSupport" mbdFilename="${MODULE_DIR}\DebugSupport.mbd" msaFilename="${MODULE_DIR}\DebugSupport.msa"/>
+ </target>
+ <target depends="DebugSupport_clean" name="clean"/>
+ <target depends="DebugSupport_cleanall" name="cleanall"/>
+ <target name="DebugSupport_clean">
+ <OutputDirSetup baseName="DebugSupport" mbdFilename="${MODULE_DIR}\DebugSupport.mbd" msaFilename="${MODULE_DIR}\DebugSupport.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DebugSupport_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DebugSupport_build.xml" target="clean"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}" excludes="*.xml"/>
+ </target>
+ <target name="DebugSupport_cleanall">
+ <OutputDirSetup baseName="DebugSupport" mbdFilename="${MODULE_DIR}\DebugSupport.mbd" msaFilename="${MODULE_DIR}\DebugSupport.msa"/>
+ <if>
+ <available file="${DEST_DIR_OUTPUT}\DebugSupport_build.xml"/>
+ <then>
+ <ant antfile="${DEST_DIR_OUTPUT}\DebugSupport_build.xml" target="cleanall"/>
+ </then>
+ </if>
+ <delete dir="${DEST_DIR_OUTPUT}"/>
+ <delete dir="${DEST_DIR_DEBUG}"/>
+ <delete>
+ <fileset dir="${BIN_DIR}" includes="**DebugSupport*"/>
+ </delete>
+ </target>
+</project>
\ No newline at end of file diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/AsmFuncs.asm b/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/AsmFuncs.asm new file mode 100644 index 0000000..89c9f83 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/AsmFuncs.asm @@ -0,0 +1,547 @@ +;******************************************************************************
+;*
+;* Copyright (c) 2006, Intel Corporation
+;* All rights reserved. This program and the accompanying materials
+;* are licensed and made available under the terms and conditions of the BSD License
+;* which accompanies this distribution. The full text of the license may be found at
+;* http://opensource.org/licenses/bsd-license.php
+;*
+;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;******************************************************************************
+
+.586p
+.MODEL FLAT, C
+
+EXCPT32_DIVIDE_ERROR EQU 0
+EXCPT32_DEBUG EQU 1
+EXCPT32_NMI EQU 2
+EXCPT32_BREAKPOINT EQU 3
+EXCPT32_OVERFLOW EQU 4
+EXCPT32_BOUND EQU 5
+EXCPT32_INVALID_OPCODE EQU 6
+EXCPT32_DOUBLE_FAULT EQU 8
+EXCPT32_INVALID_TSS EQU 10
+EXCPT32_SEG_NOT_PRESENT EQU 11
+EXCPT32_STACK_FAULT EQU 12
+EXCPT32_GP_FAULT EQU 13
+EXCPT32_PAGE_FAULT EQU 14
+EXCPT32_FP_ERROR EQU 16
+EXCPT32_ALIGNMENT_CHECK EQU 17
+EXCPT32_MACHINE_CHECK EQU 18
+EXCPT32_SIMD EQU 19
+
+FXSTOR_FLAG EQU 01000000h ; bit cpuid 24 of feature flags
+
+;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,
+;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport driver
+;; MUST check the CPUID feature flags to see that these instructions are available
+;; and fail to init if they are not.
+
+;; fxstor [edi]
+FXSTOR_EDI MACRO
+ db 0fh, 0aeh, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [edi]
+ENDM
+
+;; fxrstor [esi]
+FXRSTOR_ESI MACRO
+ db 0fh, 0aeh, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [esi]
+ENDM
+.DATA
+
+public OrigVector, InterruptEntryStub, StubSize, CommonIdtEntry, FxStorSupport
+
+StubSize dd InterruptEntryStubEnd - InterruptEntryStub
+AppEsp dd 11111111h ; ?
+DebugEsp dd 22222222h ; ?
+ExtraPush dd 33333333h ; ?
+ExceptData dd 44444444h ; ?
+Eflags dd 55555555h ; ?
+OrigVector dd 66666666h ; ?
+
+;; The declarations below define the memory region that will be used for the debug stack.
+;; The context record will be built by pushing register values onto this stack.
+;; It is imparitive that alignment be carefully managed, since the FXSTOR and
+;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.
+;;
+;; The stub will switch stacks from the application stack to the debuger stack
+;; and pushes the exception number.
+;;
+;; Then we building the context record on the stack. Since the stack grows down,
+;; we push the fields of the context record from the back to the front. There
+;; are 132 bytes of stack used prior allocating the 512 bytes of stack to be
+;; used as the memory buffer for the fxstor instruction. Therefore address of
+;; the buffer used for the FXSTOR instruction is &Eax - 132 - 512, which
+;; must be 16 byte aligned.
+;;
+;; We carefully locate the stack to make this happen.
+;;
+;; For reference, the context structure looks like this:
+;; struct {
+;; UINT32 ExceptionData;
+;; FX_SAVE_STATE FxSaveState; // 512 bytes, must be 16 byte aligned
+;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
+;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
+;; UINT32 Ldtr, Tr;
+;; UINT64 Gdtr, Idtr;
+;; UINT32 EFlags;
+;; UINT32 Eip;
+;; UINT32 SegGs, SegFs, SegEs, SegDs, SegCs, SegSs;
+;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
+;; } SYSTEM_CONTEXT_IA32; // 32 bit system context record
+
+
+align 16
+DebugStackEnd db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment
+ dd 1ffdh dup (000000000h) ;; 32K should be enough stack
+ ;; This allocation is coocked to insure
+ ;; that the the buffer for the FXSTORE instruction
+ ;; will be 16 byte aligned also.
+ ;;
+ExceptionNumber dd ? ;; first entry will be the vector number pushed by the stub
+
+DebugStackBegin db "<<<< DbgStkBegin" ;; initial debug ESP == DebugStackBegin, set in stub
+
+.CODE
+
+externdef InterruptDistrubutionHub:near
+
+;------------------------------------------------------------------------------
+; BOOLEAN
+; FxStorSupport (
+; void
+; )
+;
+; Abstract: Returns TRUE if FxStor instructions are supported
+;
+FxStorSupport PROC C PUBLIC
+
+;
+; cpuid corrupts ebx which must be preserved per the C calling convention
+;
+ push ebx
+ mov eax, 1
+ cpuid
+ mov eax, edx
+ and eax, FXSTOR_FLAG
+ shr eax, 24
+ pop ebx
+ ret
+FxStorSupport ENDP
+
+
+;------------------------------------------------------------------------------
+; DESCRIPTOR *
+; GetIdtr (
+; void
+; )
+;
+; Abstract: Returns physical address of IDTR
+;
+GetIdtr PROC C PUBLIC
+ LOCAL IdtrBuf:FWORD
+
+ sidt IdtrBuf
+ mov eax, DWORD PTR IdtrBuf + 2
+ ret
+GetIdtr ENDP
+
+
+;------------------------------------------------------------------------------
+; BOOLEAN
+; WriteInterruptFlag (
+; BOOLEAN NewState
+; )
+;
+; Abstract: Programs interrupt flag to the requested state and returns previous
+; state.
+;
+WriteInterruptFlag PROC C PUBLIC State:DWORD
+
+ pushfd
+ pop eax
+ and eax, 200h
+ shr eax, 9
+ mov ecx, State
+ .IF ecx == 0
+ cli
+ .ELSE
+ sti
+ .ENDIF
+ ret
+
+WriteInterruptFlag ENDP
+
+
+
+;------------------------------------------------------------------------------
+; void
+; Vect2Desc (
+; DESCRIPTOR * DestDesc,
+; void (*Vector) (void)
+; )
+;
+; Abstract: Encodes an IDT descriptor with the given physical address
+;
+Vect2Desc PROC C PUBLIC DestPtr:DWORD, Vector:DWORD
+
+ mov eax, Vector
+ mov ecx, DestPtr
+ mov word ptr [ecx], ax ; write bits 15..0 of offset
+ mov word ptr [ecx+2], 20h ; SYS_CODE_SEL from GDT
+ mov word ptr [ecx+4], 0e00h OR 8000h ; type = 386 interrupt gate, present
+ shr eax, 16
+ mov word ptr [ecx+6], ax ; write bits 31..16 of offset
+
+ ret
+
+Vect2Desc ENDP
+
+
+
+;------------------------------------------------------------------------------
+; InterruptEntryStub
+;
+; Abstract: This code is not a function, but is a small piece of code that is
+; copied and fixed up once for each IDT entry that is hooked.
+;
+InterruptEntryStub::
+ mov AppEsp, esp ; save stack top
+ mov esp, offset DebugStackBegin ; switch to debugger stack
+ push 0 ; push vector number - will be modified before installed
+ db 0e9h ; jump rel32
+ dd 0 ; fixed up to relative address of CommonIdtEntry
+InterruptEntryStubEnd:
+
+
+
+;------------------------------------------------------------------------------
+; CommonIdtEntry
+;
+; Abstract: This code is not a function, but is the common part for all IDT
+; vectors.
+;
+CommonIdtEntry::
+;;
+;; At this point, the stub has saved the current application stack esp into AppEsp
+;; and switched stacks to the debug stack, where it pushed the vector number
+;;
+;; The application stack looks like this:
+;;
+;; ...
+;; (last application stack entry)
+;; eflags from interrupted task
+;; CS from interrupted task
+;; EIP from interrupted task
+;; Error code <-------------------- Only present for some exeption types
+;;
+;;
+
+
+;; The stub switched us to the debug stack and pushed the interrupt number.
+;;
+;; Next, construct the context record. It will be build on the debug stack by
+;; pushing the registers in the correct order so as to create the context structure
+;; on the debug stack. The context record must be built from the end back to the
+;; beginning because the stack grows down...
+;
+;; For reference, the context record looks like this:
+;;
+;; typedef
+;; struct {
+;; UINT32 ExceptionData;
+;; FX_SAVE_STATE FxSaveState;
+;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
+;; UINT32 Cr0, Cr2, Cr3, Cr4;
+;; UINT32 Ldtr, Tr;
+;; UINT64 Gdtr, Idtr;
+;; UINT32 EFlags;
+;; UINT32 Eip;
+;; UINT32 SegGs, SegFs, SegEs, SegDs, SegCs, SegSs;
+;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
+;; } SYSTEM_CONTEXT_IA32; // 32 bit system context record
+
+;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
+ pushad
+
+;; Save interrupt state eflags register...
+ pushfd
+ pop eax
+ mov dword ptr Eflags, eax
+
+;; We need to determine if any extra data was pushed by the exception, and if so, save it
+;; To do this, we check the exception number pushed by the stub, and cache the
+;; result in a variable since we'll need this again.
+ .IF ExceptionNumber == EXCPT32_DOUBLE_FAULT
+ mov ExtraPush, 1
+ .ELSEIF ExceptionNumber == EXCPT32_INVALID_TSS
+ mov ExtraPush, 1
+ .ELSEIF ExceptionNumber == EXCPT32_SEG_NOT_PRESENT
+ mov ExtraPush, 1
+ .ELSEIF ExceptionNumber == EXCPT32_STACK_FAULT
+ mov ExtraPush, 1
+ .ELSEIF ExceptionNumber == EXCPT32_GP_FAULT
+ mov ExtraPush, 1
+ .ELSEIF ExceptionNumber == EXCPT32_PAGE_FAULT
+ mov ExtraPush, 1
+ .ELSEIF ExceptionNumber == EXCPT32_ALIGNMENT_CHECK
+ mov ExtraPush, 1
+ .ELSE
+ mov ExtraPush, 0
+ .ENDIF
+
+;; If there's some extra data, save it also, and modify the saved AppEsp to effectively
+;; pop this value off the application's stack.
+ .IF ExtraPush == 1
+ mov eax, AppEsp
+ mov ebx, [eax]
+ mov ExceptData, ebx
+ add eax, 4
+ mov AppEsp, eax
+ .ELSE
+ mov ExceptData, 0
+ .ENDIF
+
+;; The "pushad" above pushed the debug stack esp. Since what we're actually doing
+;; is building the context record on the debug stack, we need to save the pushed
+;; debug ESP, and replace it with the application's last stack entry...
+ mov eax, [esp + 12]
+ mov DebugEsp, eax
+ mov eax, AppEsp
+ add eax, 12
+ ; application stack has eflags, cs, & eip, so
+ ; last actual application stack entry is
+ ; 12 bytes into the application stack.
+ mov [esp + 12], eax
+
+;; continue building context record
+;; UINT32 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
+ mov eax, ss
+ push eax
+
+ ; CS from application is one entry back in application stack
+ mov eax, AppEsp
+ movzx eax, word ptr [eax + 4]
+ push eax
+
+ mov eax, ds
+ push eax
+ mov eax, es
+ push eax
+ mov eax, fs
+ push eax
+ mov eax, gs
+ push eax
+
+;; UINT32 Eip;
+ ; Eip from application is on top of application stack
+ mov eax, AppEsp
+ push dword ptr [eax]
+
+;; UINT64 Gdtr, Idtr;
+ push 0
+ push 0
+ sidt fword ptr [esp]
+ push 0
+ push 0
+ sgdt fword ptr [esp]
+
+;; UINT32 Ldtr, Tr;
+ xor eax, eax
+ str ax
+ push eax
+ sldt ax
+ push eax
+
+;; UINT32 EFlags;
+;; Eflags from application is two entries back in application stack
+ mov eax, AppEsp
+ push dword ptr [eax + 8]
+
+;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
+;; insure FXSAVE/FXRSTOR is enabled in CR4...
+;; ... while we're at it, make sure DE is also enabled...
+ mov eax, cr4
+ or eax, 208h
+ mov cr4, eax
+ push eax
+ mov eax, cr3
+ push eax
+ mov eax, cr2
+ push eax
+ push 0
+ mov eax, cr0
+ push eax
+
+;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
+ mov eax, dr7
+ push eax
+;; clear Dr7 while executing debugger itself
+ xor eax, eax
+ mov dr7, eax
+
+ mov eax, dr6
+ push eax
+;; insure all status bits in dr6 are clear...
+ xor eax, eax
+ mov dr6, eax
+
+ mov eax, dr3
+ push eax
+ mov eax, dr2
+ push eax
+ mov eax, dr1
+ push eax
+ mov eax, dr0
+ push eax
+
+;; FX_SAVE_STATE FxSaveState;
+ sub esp, 512
+ mov edi, esp
+ ; IMPORTANT!! The debug stack has been carefully constructed to
+ ; insure that esp and edi are 16 byte aligned when we get here.
+ ; They MUST be. If they are not, a GP fault will occur.
+ FXSTOR_EDI
+
+;; UINT32 ExceptionData;
+ mov eax, ExceptData
+ push eax
+
+; call to C code which will in turn call registered handler
+; pass in the vector number
+ mov eax, esp
+ push eax
+ mov eax, ExceptionNumber
+ push eax
+ call InterruptDistrubutionHub
+ add esp, 8
+
+; restore context...
+;; UINT32 ExceptionData;
+ add esp, 4
+
+;; FX_SAVE_STATE FxSaveState;
+ mov esi, esp
+ FXRSTOR_ESI
+ add esp, 512
+
+;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
+ pop eax
+ mov dr0, eax
+ pop eax
+ mov dr1, eax
+ pop eax
+ mov dr2, eax
+ pop eax
+ mov dr3, eax
+;; skip restore of dr6. We cleared dr6 during the context save.
+ add esp, 4
+ pop eax
+ mov dr7, eax
+
+;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
+ pop eax
+ mov cr0, eax
+ add esp, 4
+ pop eax
+ mov cr2, eax
+ pop eax
+ mov cr3, eax
+ pop eax
+ mov cr4, eax
+
+;; UINT32 EFlags;
+ mov eax, AppEsp
+ pop dword ptr [eax + 8]
+
+;; UINT16 Ldtr, Tr;
+;; UINT64 Gdtr, Idtr;
+;; Best not let anyone mess with these particular registers...
+ add esp, 24
+
+;; UINT32 Eip;
+ pop dword ptr [eax]
+
+;; UINT32 SegGs, SegFs, SegEs, SegDs, SegCs, SegSs;
+;; NOTE - modified segment registers could hang the debugger... We
+;; could attempt to insulate ourselves against this possibility,
+;; but that poses risks as well.
+;;
+
+ pop gs
+ pop fs
+ pop es
+ pop ds
+ pop [eax + 4]
+ pop ss
+
+;; The next stuff to restore is the general purpose registers that were pushed
+;; using the pushad instruction.
+;;
+;; The value of ESP as stored in the context record is the application ESP
+;; including the 3 entries on the application stack caused by the exception
+;; itself. It may have been modified by the debug agent, so we need to
+;; determine if we need to relocate the application stack.
+
+ mov ebx, [esp + 12] ; move the potentially modified AppEsp into ebx
+ mov eax, AppEsp
+ add eax, 12
+ cmp ebx, eax
+ je NoAppStackMove
+
+ mov eax, AppEsp
+ mov ecx, [eax] ; EIP
+ mov [ebx], ecx
+
+ mov ecx, [eax + 4] ; CS
+ mov [ebx + 4], ecx
+
+ mov ecx, [eax + 8] ; EFLAGS
+ mov [ebx + 8], ecx
+
+ mov eax, ebx ; modify the saved AppEsp to the new AppEsp
+ mov AppEsp, eax
+NoAppStackMove:
+ mov eax, DebugEsp ; restore the DebugEsp on the debug stack
+ ; so our popad will not cause a stack switch
+ mov [esp + 12], eax
+
+ cmp ExceptionNumber, 068h
+ jne NoChain
+
+Chain:
+
+;; Restore eflags so when we chain, the flags will be exactly as if we were never here.
+;; We gin up the stack to do an iretd so we can get ALL the flags.
+ mov eax, AppEsp
+ mov ebx, [eax + 8]
+ and ebx, NOT 300h ; special handling for IF and TF
+ push ebx
+ push cs
+ push PhonyIretd
+ iretd
+PhonyIretd:
+
+;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
+ popad
+
+;; Switch back to application stack
+ mov esp, AppEsp
+
+;; Jump to original handler
+ jmp OrigVector
+
+NoChain:
+;; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
+ popad
+
+;; Switch back to application stack
+ mov esp, AppEsp
+
+;; We're outa here...
+ iretd
+END
+
+
+
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/plDebugSupport.c b/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/plDebugSupport.c new file mode 100644 index 0000000..2198192 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/plDebugSupport.c @@ -0,0 +1,440 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ plDebugSupport.c
+
+Abstract:
+
+ IA32 specific debug support functions
+
+Revision History
+
+--*/
+
+//
+// private header files
+//
+#include "plDebugSupport.h"
+
+//
+// This the global main table to keep track of the interrupts
+//
+IDT_ENTRY *IdtEntryTable = NULL;
+DESCRIPTOR NullDesc = 0;
+
+#ifndef EFI_NT_EMULATOR
+STATIC
+EFI_STATUS
+CreateEntryStub (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ OUT VOID **Stub
+ )
+/*++
+
+Routine Description: Allocate pool for a new IDT entry stub. Copy the generic
+ stub into the new buffer and fixup the vector number and jump target address.
+
+Arguments:
+ ExceptionType - This is the exception type that the new stub will be created
+ for.
+ Stub - On successful exit, *Stub contains the newly allocated entry stub.
+Returns:
+ Typically EFI_SUCCESS
+ other possibilities are passed through from AllocatePool
+
+--*/
+{
+ EFI_STATUS Status;
+ UINT8 *StubCopy;
+
+ //
+ // First, allocate a new buffer and copy the stub code into it
+ //
+ Status = gBS->AllocatePool (EfiBootServicesData, StubSize, Stub);
+ if (Status == EFI_SUCCESS) {
+ StubCopy = *Stub;
+ gBS->CopyMem (StubCopy, InterruptEntryStub, StubSize);
+
+ //
+ // Next fixup the stub code for this vector
+ //
+
+ // The stub code looks like this:
+ //
+ // 00000000 89 25 00000004 R mov AppEsp, esp ; save stack top
+ // 00000006 BC 00008014 R mov esp, offset DbgStkBot ; switch to debugger stack
+ // 0000000B 6A 00 push 0 ; push vector number - will be modified before installed
+ // 0000000D E9 db 0e9h ; jump rel32
+ // 0000000E 00000000 dd 0 ; fixed up to relative address of CommonIdtEntry
+ //
+
+ //
+ // poke in the exception type so the second push pushes the exception type
+ //
+ StubCopy[0x0c] = (UINT8) ExceptionType;
+
+ //
+ // fixup the jump target to point to the common entry
+ //
+ *(UINT32 *) &StubCopy[0x0e] = (UINT32) CommonIdtEntry - (UINT32) &StubCopy[StubSize];
+ }
+
+ return Status;
+}
+
+STATIC
+EFI_STATUS
+HookEntry (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN VOID (*NewCallback) ()
+ )
+/*++
+
+Routine Description:
+ Creates a nes entry stub. Then saves the current IDT entry and replaces it
+ with an interrupt gate for the new entry point. The IdtEntryTable is updated
+ with the new registered function.
+
+ This code executes in boot services context. The stub entry executes in interrupt
+ context.
+
+Arguments:
+ ExceptionType - specifies which vector to hook.
+ NewCallback - a pointer to the new function to be registered.
+
+Returns:
+ EFI_SUCCESS
+ Other possibilities are passed through by CreateEntryStub
+
+--*/
+// TODO: ) - add argument and description to function comment
+{
+ BOOLEAN OldIntFlagState;
+ EFI_STATUS Status;
+
+ Status = CreateEntryStub (ExceptionType, (VOID **) &IdtEntryTable[ExceptionType].StubEntry);
+ if (Status == EFI_SUCCESS) {
+ OldIntFlagState = WriteInterruptFlag (0);
+ ReadIdt (ExceptionType, &(IdtEntryTable[ExceptionType].OrigDesc));
+
+ ((UINT16 *) &IdtEntryTable[ExceptionType].OrigVector)[0] = ((UINT16 *) &IdtEntryTable[ExceptionType].OrigDesc)[0];
+ ((UINT16 *) &IdtEntryTable[ExceptionType].OrigVector)[1] = ((UINT16 *) &IdtEntryTable[ExceptionType].OrigDesc)[3];
+
+ Vect2Desc (&IdtEntryTable[ExceptionType].NewDesc, IdtEntryTable[ExceptionType].StubEntry);
+ IdtEntryTable[ExceptionType].RegisteredCallback = NewCallback;
+ WriteIdt (ExceptionType, &(IdtEntryTable[ExceptionType].NewDesc));
+ WriteInterruptFlag (OldIntFlagState);
+ }
+
+ return Status;
+}
+
+STATIC
+EFI_STATUS
+UnhookEntry (
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ )
+/*++
+
+Routine Description:
+ Undoes HookEntry. This code executes in boot services context.
+
+Arguments:
+ ExceptionType - specifies which entry to unhook
+
+Returns:
+ EFI_SUCCESS
+ Other values are passed through from FreePool
+
+--*/
+{
+ BOOLEAN OldIntFlagState;
+ EFI_STATUS Status;
+
+ OldIntFlagState = WriteInterruptFlag (0);
+ WriteIdt (ExceptionType, &(IdtEntryTable[ExceptionType].OrigDesc));
+ Status = gBS->FreePool ((VOID *) (UINTN) IdtEntryTable[ExceptionType].StubEntry);
+ ZeroMem (&IdtEntryTable[ExceptionType], sizeof (IDT_ENTRY));
+ WriteInterruptFlag (OldIntFlagState);
+
+ return (Status);
+}
+#endif
+
+EFI_STATUS
+ManageIdtEntryTable (
+ VOID (*NewCallback)(),
+ EFI_EXCEPTION_TYPE ExceptionType
+ )
+/*++
+
+Routine Description:
+ This is the main worker function that manages the state of the interrupt
+ handlers. It both installs and uninstalls interrupt handlers based on the
+ value of NewCallback. If NewCallback is NULL, then uninstall is indicated.
+ If NewCallback is non-NULL, then install is indicated.
+
+Arguments:
+ NewCallback - If non-NULL, NewCallback specifies the new handler to register.
+ If NULL, specifies that the previously registered handler should
+ be uninstalled.
+ ExceptionType - Indicates which entry to manage
+
+Returns:
+ EFI_SUCCESS
+ EFI_INVALID_PARAMETER - requested uninstalling a handler from a vector that has
+ no handler registered for it
+ EFI_ALREADY_STARTED - requested install to a vector that already has a handler registered.
+
+ Other possible return values are passed through from UnHookEntry and HookEntry.
+
+--*/
+// TODO: ) - add argument and description to function comment
+{
+ EFI_STATUS Status;
+
+ Status = EFI_SUCCESS;
+
+#ifndef EFI_NT_EMULATOR
+ if (CompareDescriptor (&IdtEntryTable[ExceptionType].NewDesc, &NullDesc)) {
+ //
+ // we've already installed to this vector
+ //
+ if (NewCallback != NULL) {
+ //
+ // if the input handler is non-null, error
+ //
+ Status = EFI_ALREADY_STARTED;
+ } else {
+ Status = UnhookEntry (ExceptionType);
+ }
+ } else {
+ //
+ // no user handler installed on this vector
+ //
+ if (NewCallback == NULL) {
+ //
+ // if the input handler is null, error
+ //
+ Status = EFI_INVALID_PARAMETER;
+ } else {
+ Status = HookEntry (ExceptionType, NewCallback);
+ }
+ }
+#endif
+ return Status;
+}
+
+EFI_STATUS
+EFIAPI
+GetMaximumProcessorIndex (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ OUT UINTN *MaxProcessorIndex
+ )
+/*++
+
+Routine Description: This is a DebugSupport protocol member function.
+
+Arguments:
+
+Returns: Always returns EFI_SUCCESS with *MaxProcessorIndex set to 0
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: MaxProcessorIndex - add argument and description to function comment
+{
+ *MaxProcessorIndex = 0;
+ return (EFI_SUCCESS);
+}
+
+EFI_STATUS
+EFIAPI
+RegisterPeriodicCallback (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_PERIODIC_CALLBACK PeriodicCallback
+ )
+/*++
+
+Routine Description: This is a DebugSupport protocol member function.
+
+Arguments:
+
+Returns:
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: ProcessorIndex - add argument and description to function comment
+// TODO: PeriodicCallback - add argument and description to function comment
+{
+ return ManageIdtEntryTable (PeriodicCallback, SYSTEM_TIMER_VECTOR);
+}
+
+EFI_STATUS
+EFIAPI
+RegisterExceptionCallback (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_EXCEPTION_CALLBACK NewCallback,
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ )
+/*++
+
+Routine Description:
+ This is a DebugSupport protocol member function.
+
+ This code executes in boot services context.
+
+Arguments:
+
+Returns:
+
+ None
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: ProcessorIndex - add argument and description to function comment
+// TODO: NewCallback - add argument and description to function comment
+// TODO: ExceptionType - add argument and description to function comment
+{
+ return ManageIdtEntryTable (NewCallback, ExceptionType);
+}
+
+EFI_STATUS
+EFIAPI
+InvalidateInstructionCache (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN VOID *Start,
+ IN UINT64 Length
+ )
+/*++
+
+Routine Description:
+ This is a DebugSupport protocol member function.
+ For IA32, this is a no-op since the instruction and data caches are coherent.
+
+Arguments:
+
+Returns:
+
+ None
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: ProcessorIndex - add argument and description to function comment
+// TODO: Start - add argument and description to function comment
+// TODO: Length - add argument and description to function comment
+// TODO: EFI_SUCCESS - add return value to function comment
+{
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+plInitializeDebugSupportDriver (
+ VOID
+ )
+/*++
+
+Routine Description:
+ Initializes driver's handler registration database.
+
+ This code executes in boot services context.
+
+Arguments:
+ None
+
+Returns:
+ EFI_SUCCESS
+ EFI_UNSUPPORTED - if IA32 processor does not support FXSTOR/FXRSTOR instructions,
+ the context save will fail, so these processor's are not supported.
+
+--*/
+// TODO: EFI_OUT_OF_RESOURCES - add return value to function comment
+{
+ if (!FxStorSupport ()) {
+ return EFI_UNSUPPORTED;
+ } else {
+ IdtEntryTable = AllocateZeroPool (sizeof (IDT_ENTRY) * NUM_IDT_ENTRIES);
+ if (IdtEntryTable != NULL) {
+ return EFI_SUCCESS;
+ } else {
+ return EFI_OUT_OF_RESOURCES;
+ }
+ }
+}
+
+EFI_STATUS
+EFIAPI
+plUnloadDebugSupportDriver (
+ IN EFI_HANDLE ImageHandle
+ )
+/*++
+
+Routine Description:
+ This is the callback that is written to the LoadedImage protocol instance
+ on the image handle. It uninstalls all registered handlers and frees all entry
+ stub memory.
+
+ This code executes in boot services context.
+
+Arguments:
+ ImageHandle - The image handle of the unload handler
+
+Returns:
+
+ None
+
+--*/
+// TODO: EFI_SUCCESS - add return value to function comment
+{
+ EFI_EXCEPTION_TYPE ExceptionType;
+
+ for (ExceptionType = 0; ExceptionType < NUM_IDT_ENTRIES; ExceptionType++) {
+ ManageIdtEntryTable (NULL, ExceptionType);
+ }
+
+ gBS->FreePool (IdtEntryTable);
+ return EFI_SUCCESS;
+}
+
+VOID
+InterruptDistrubutionHub (
+ EFI_EXCEPTION_TYPE ExceptionType,
+ EFI_SYSTEM_CONTEXT_IA32 *ContextRecord
+ )
+/*++
+
+Routine Description: Common piece of code that invokes the registered handlers.
+
+ This code executes in exception context so no efi calls are allowed.
+
+Arguments:
+
+Returns:
+
+ None
+
+--*/
+// TODO: ExceptionType - add argument and description to function comment
+// TODO: ContextRecord - add argument and description to function comment
+{
+ if (IdtEntryTable[ExceptionType].RegisteredCallback != NULL) {
+ if (ExceptionType != SYSTEM_TIMER_VECTOR) {
+ IdtEntryTable[ExceptionType].RegisteredCallback (ExceptionType, ContextRecord);
+ } else {
+ OrigVector = IdtEntryTable[ExceptionType].OrigVector;
+ IdtEntryTable[ExceptionType].RegisteredCallback (ContextRecord);
+ }
+ }
+}
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/plDebugSupport.h b/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/plDebugSupport.h new file mode 100644 index 0000000..abb6967 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ia32/plDebugSupport.h @@ -0,0 +1,312 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ plDebugSupport.h
+
+Abstract:
+
+ IA32 specific debug support macros, typedefs and prototypes.
+
+Revision History
+
+--*/
+
+#ifndef _PLDEBUG_SUPPORT_H
+#define _PLDEBUG_SUPPORT_H
+
+#define NUM_IDT_ENTRIES 0x78
+#define SYSTEM_TIMER_VECTOR 0x68
+#define VECTOR_ENTRY_PAGES 1
+#define CopyDescriptor(Dest, Src) CopyMem ((Dest), (Src), sizeof (DESCRIPTOR))
+#define ZeroDescriptor(Dest) CopyDescriptor ((Dest), &NullDesc)
+#define ReadIdt(Vector, Dest) CopyDescriptor ((Dest), &((GetIdtr ())[(Vector)]))
+#define WriteIdt(Vector, Src) CopyDescriptor (&((GetIdtr ())[(Vector)]), (Src))
+#define CompareDescriptor(Desc1, Desc2) CompareMem ((Desc1), (Desc2), sizeof (DESCRIPTOR))
+#define EFI_ISA IsaIa32
+#define FF_FXSR (1 << 24)
+
+typedef UINT64 DESCRIPTOR;
+
+typedef struct {
+ DESCRIPTOR OrigDesc;
+ VOID (*OrigVector) (VOID);
+ DESCRIPTOR NewDesc;
+ VOID (*StubEntry) (VOID);
+ VOID (*RegisteredCallback) ();
+} IDT_ENTRY;
+
+extern EFI_SYSTEM_CONTEXT SystemContext;
+extern UINT8 InterruptEntryStub[];
+extern UINT32 StubSize;
+extern VOID (*OrigVector) (VOID);
+
+VOID
+CommonIdtEntry (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ None
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+BOOLEAN
+FxStorSupport (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ None
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+DESCRIPTOR *
+GetIdtr (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ None
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+VOID
+Vect2Desc (
+ DESCRIPTOR * DestDesc,
+ VOID (*Vector) (VOID)
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ DestDesc - TODO: add argument description
+ ) - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+BOOLEAN
+WriteInterruptFlag (
+ BOOLEAN NewState
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ NewState - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+EFI_STATUS
+plInitializeDebugSupportDriver (
+ VOID
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ None
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+EFI_STATUS
+EFIAPI
+plUnloadDebugSupportDriver (
+ IN EFI_HANDLE ImageHandle
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ ImageHandle - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+//
+// DebugSupport protocol member functions
+//
+EFI_STATUS
+EFIAPI
+GetMaximumProcessorIndex (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ OUT UINTN *MaxProcessorIndex
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ This - TODO: add argument description
+ MaxProcessorIndex - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+EFI_STATUS
+EFIAPI
+RegisterPeriodicCallback (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_PERIODIC_CALLBACK PeriodicCallback
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ This - TODO: add argument description
+ ProcessorIndex - TODO: add argument description
+ PeriodicCallback - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+EFI_STATUS
+EFIAPI
+RegisterExceptionCallback (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_EXCEPTION_CALLBACK NewCallback,
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ This - TODO: add argument description
+ ProcessorIndex - TODO: add argument description
+ NewCallback - TODO: add argument description
+ ExceptionType - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+EFI_STATUS
+EFIAPI
+InvalidateInstructionCache (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN VOID *Start,
+ IN UINT64 Length
+ )
+/*++
+
+Routine Description:
+
+ TODO: Add function description
+
+Arguments:
+
+ This - TODO: add argument description
+ ProcessorIndex - TODO: add argument description
+ Start - TODO: add argument description
+ Length - TODO: add argument description
+
+Returns:
+
+ TODO: add return values
+
+--*/
+;
+
+#endif
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/AsmFuncs.s b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/AsmFuncs.s new file mode 100644 index 0000000..1ac4a7e --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/AsmFuncs.s @@ -0,0 +1,1389 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// AsmFuncs.s
+//
+// Abstract:
+//
+// Low level IPF routines used by the debug support driver
+//
+// Revision History:
+//
+//--
+
+
+#include "common.i"
+#include "Ds64Macros.i"
+
+.global PatchSaveBuffer
+.global IpfContextBuf
+.global CommonHandler
+.global ExternalInterruptCount
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// InstructionCacheFlush
+//
+// Description:
+// Flushes instruction cache for specified number of bytes
+//
+ .global InstructionCacheFlush
+ .proc InstructionCacheFlush
+ .align 32
+InstructionCacheFlush::
+ { .mii
+ alloc r3=2, 0, 0, 0
+ cmp4.leu p0,p6=32, r33;;
+ (p6) mov r33=32;;
+ }
+ { .mii
+ nop.m 0
+ zxt4 r29=r33;;
+ dep.z r30=r29, 0, 5;;
+ }
+ { .mii
+ cmp4.eq p0,p7=r0, r30
+ shr.u r28=r29, 5;;
+ (p7) adds r28=1, r28;;
+ }
+ { .mii
+ nop.m 0
+ shl r27=r28, 5;;
+ zxt4 r26=r27;;
+ }
+ { .mfb
+ add r31=r26, r32
+ nop.f 0
+ nop.b 0
+ }
+LoopBack: // $L143:
+ { .mii
+ fc r32
+ adds r32=32, r32;;
+ cmp.ltu p14,p15=r32, r31
+ }
+ { .mfb
+ nop.m 0
+ nop.f 0
+ //(p14) br.cond.dptk.few $L143#;;
+ (p14) br.cond.dptk.few LoopBack;;
+ }
+ { .mmi
+ sync.i;;
+ srlz.i
+ nop.i 0;;
+ }
+ { .mfb
+ nop.m 0
+ nop.f 0
+ br.ret.sptk.few b0;;
+ }
+ .endp InstructionCacheFlush
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// ChainHandler
+//
+// Description:
+// Chains an interrupt handler
+//
+// The purpose of this function is to enable chaining of the external interrupt.
+// Since there's no clean SAL abstraction for doing this, we must do it
+// surreptitiously.
+//
+// The reserved IVT entry at offset 0x3400 is coopted for use by this handler.
+// According to Itanium architecture, it is reserved. Strictly speaking, this is
+// not safe, as we're cheating and violating the Itanium architecture. However,
+// as long as we're the only ones cheating, we should be OK. Without hooks in
+// the SAL to enable IVT management, there aren't many good options.
+//
+// The strategy is to replace the first bundle of the external interrupt handler
+// with our own that will branch into a piece of code we've supplied and located
+// in the reserved IVT entry. Only the first bundle of the external interrupt
+// IVT entry is modified.
+//
+// The original bundle is moved and relocated to space
+// allocated within the reserved IVT entry. The next bundle following is
+// is generated to go a hard coded branch back to the second bundle of the
+// external interrupt IVT entry just in case the first bundle had no branch.
+//
+// Our new code will execute our handler, and then fall through to the
+// original bundle after restoring all context appropriately.
+//
+// The following is a representation of what the IVT memory map looks like with
+// our chained handler installed:
+//
+//
+//
+//
+//
+// This IVT entry is Failsafe bundle
+// reserved by the
+// Itanium architecture Original bundle 0
+// and is used for
+// for locating our
+// handler and the
+// original bundle Patch code...
+// zero of the ext
+// interrupt handler
+//
+// RSVD (3400) Unused
+//
+//
+//
+//
+//
+//
+//
+//
+//
+//
+//
+//
+// EXT_INT (3000) Bundle 0 Bundle zero - This one is
+// modified, all other bundles
+// in the EXT_INT entry are
+// untouched.
+//
+//
+// Arguments:
+//
+// Returns:
+//
+// Notes:
+//
+//
+ .global ChainHandler
+ .proc ChainHandler
+ChainHandler:
+
+ NESTED_SETUP( 0,2+3,3,0 )
+
+ mov r8=1 // r8 = success
+ mov r2=cr.iva;;
+//
+// NOTE: There's a potential hazard here in that we're simply stealing a bunch of
+// bundles (memory) from the IVT and assuming there's no catastrophic side effect.
+//
+// First, save IVT area we're taking over with the patch so we can restore it later
+//
+ addl out0=PATCH_ENTRY_OFFSET, r2 // out0 = source buffer
+ movl out1=PatchSaveBuffer // out1 = destination buffer
+ mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry
+ br.call.sptk.few b0 = CopyBundles
+
+// Next, copy the patch code into the IVT
+ movl out0=PatchCode // out0 = source buffer of patch code
+ addl out1=PATCH_OFFSET, r2 // out1 = destination buffer - in IVT
+ mov out2=NUM_PATCH_BUNDLES;; // out2 = number of bundles to copy
+ br.call.sptk.few b0 = CopyBundles
+
+
+// copy original bundle 0 from the external interrupt handler to the
+// appropriate place in the reserved IVT interrupt slot
+ addl out0=EXT_INT_ENTRY_OFFSET, r2 // out0 = source buffer
+ addl out1=RELOCATED_EXT_INT, r2 // out1 = destination buffer - in reserved IVT
+ mov out2=1;; // out2 = copy 1 bundle
+ br.call.sptk.few b0 = CopyBundles
+
+// Now relocate it there because it very likely had a branch instruction that
+// that must now be fixed up.
+ addl out0=RELOCATED_EXT_INT, r2 // out0 = new runtime address of bundle - in reserved IVT
+ addl out1=EXT_INT_ENTRY_OFFSET, r2;;// out1 = IP address of previous location
+ mov out2=out0;; // out2 = IP address of new location
+ br.call.sptk.few b0 = RelocateBundle
+
+// Now copy into the failsafe branch into the next bundle just in case
+// the original ext int bundle 0 bundle did not contain a branch instruction
+ movl out0=FailsafeBranch // out0 = source buffer
+ addl out1=FAILSAFE_BRANCH_OFFSET, r2 // out1 = destination buffer - in reserved IVT
+ mov out2=1;; // out2 = copy 1 bundle
+ br.call.sptk.few b0 = CopyBundles
+
+// Last, copy in our replacement for the external interrupt IVT entry bundle 0
+ movl out0=PatchCodeNewBun0 // out0 = source buffer - our replacement bundle 0
+ addl out1=EXT_INT_ENTRY_OFFSET, r2 // out1 = destination buffer - bundle 0 of External interrupt entry
+ mov out2=1;; // out2 = copy 1 bundle
+ br.call.sptk.few b0 = CopyBundles
+
+ChainHandlerDone:
+ NESTED_RETURN
+
+ .endp ChainHandler
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// UnchainHandler
+//
+// Description:
+// Unchains an interrupt handler
+//
+// Arguments:
+//
+// Returns:
+//
+// Notes:
+//
+//
+ .global UnchainHandler
+ .proc UnchainHandler
+
+UnchainHandler:
+
+ NESTED_SETUP( 0,2+3,3,0 )
+
+ mov r8=1 // r8 = success
+ mov r2=cr.iva;; // r2 = interrupt vector address
+
+// First copy original Ext Int bundle 0 back to it's proper home...
+ addl out0=RELOCATED_EXT_INT, r2 // out0 = source - in reserved IVT
+ addl out1=EXT_INT_ENTRY_OFFSET, r2 // out1 = destination buffer - first bundle of Ext Int entry
+ mov out2=1;; // out2 = copy 1 bundle
+ br.call.sptk.few b0 = CopyBundles
+
+// Now, relocate it again...
+ addl out0=EXT_INT_ENTRY_OFFSET, r2 // out1 = New runtime address
+ addl out1=RELOCATED_EXT_INT, r2;; // out0 = IP address of previous location
+ mov out2=out0;; // out2 = IP address of new location
+ br.call.sptk.few b0 = RelocateBundle
+
+// Last, restore the patch area
+ movl out0=PatchSaveBuffer // out0 = source buffer
+ addl out1=PATCH_ENTRY_OFFSET, r2 // out1 = destination buffer
+ mov out2=0x40;; // out2 = number of bundles to copy... save entire IDT entry
+ br.call.sptk.few b0 = CopyBundles
+
+UnchainHandlerDone:
+ NESTED_RETURN
+
+ .endp UnchainHandler
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// CopyBundles
+//
+// Description:
+// Copies instruction bundles - flushes icache as necessary
+//
+// Arguments:
+// in0 - Bundle source
+// in1 - Bundle destination
+// in2 - Bundle count
+//
+// Returns:
+//
+// Notes:
+// This procedure is a leaf routine
+//
+ .proc CopyBundles
+
+CopyBundles:
+
+ NESTED_SETUP(3,2+1,0,0)
+
+ shl in2=in2, 1;; // in2 = count of 8 byte blocks to copy
+
+CopyBundlesLoop:
+
+ cmp.eq p14, p15 = 0, in2;; // Check if done
+(p14) br.sptk.few CopyBundlesDone;;
+
+ ld8 loc2=[in0], 0x8;; // loc2 = source bytes
+ st8 [in1]=loc2;; // [in1] = destination bytes
+ fc in1;; // Flush instruction cache
+ sync.i;; // Ensure local and remote data/inst caches in sync
+ srlz.i;; // Ensure sync has been observed
+ add in1=0x8, in1;; // in1 = next destination
+ add in2=-1, in2;; // in2 = decrement 8 bytes blocks to copy
+ br.sptk.few CopyBundlesLoop;;
+
+CopyBundlesDone:
+ NESTED_RETURN
+
+ .endp CopyBundles
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// RelocateBundle
+//
+// Description:
+// Relocates an instruction bundle by updating any ip-relative branch instructions.
+//
+// Arguments:
+// in0 - Runtime address of bundle
+// in1 - IP address of previous location of bundle
+// in2 - IP address of new location of bundle
+//
+// Returns:
+// in0 - 1 if successful or 0 if unsuccessful
+//
+// Notes:
+// This routine examines all slots in the given bundle that are destined for the
+// branch execution unit. If any of these slots contain an IP-relative branch
+// namely instructions B1, B2, B3, or B6, the slot is fixed-up with a new relative
+// address. Errors can occur if a branch cannot be reached.
+//
+ .proc RelocateBundle
+
+RelocateBundle:
+
+ NESTED_SETUP(3,2+4,3,0)
+
+ mov loc2=SLOT0 // loc2 = slot index
+ mov loc5=in0;; // loc5 = runtime address of bundle
+ mov in0=1;; // in0 = success
+
+RelocateBundleNextSlot:
+
+ cmp.ge p14, p15 = SLOT2, loc2;; // Check if maximum slot
+(p15) br.sptk.few RelocateBundleDone
+
+ mov out0=loc5;; // out0 = runtime address of bundle
+ br.call.sptk.few b0 = GetTemplate
+ mov loc3=out0;; // loc3 = instruction template
+ mov out0=loc5 // out0 = runtime address of bundle
+ mov out1=loc2;; // out1 = instruction slot number
+ br.call.sptk.few b0 = GetSlot
+ mov loc4=out0;; // loc4 = instruction encoding
+ mov out0=loc4 // out0 = instuction encoding
+ mov out1=loc2 // out1 = instruction slot number
+ mov out2=loc3;; // out2 = instruction template
+ br.call.sptk.few b0 = IsSlotBranch
+ cmp.eq p14, p15 = 1, out0;; // Check if branch slot
+(p15) add loc2=1,loc2 // Increment slot
+(p15) br.sptk.few RelocateBundleNextSlot
+ mov out0=loc4 // out0 = instuction encoding
+ mov out1=in1 // out1 = IP address of previous location
+ mov out2=in2;; // out2 = IP address of new location
+ br.call.sptk.few b0 = RelocateSlot
+ cmp.eq p14, p15 = 1, out1;; // Check if relocated slot
+(p15) mov in0=0 // in0 = failure
+(p15) br.sptk.few RelocateBundleDone
+ mov out2=out0;; // out2 = instruction encoding
+ mov out0=loc5 // out0 = runtime address of bundle
+ mov out1=loc2;; // out1 = instruction slot number
+ br.call.sptk.few b0 = SetSlot
+ add loc2=1,loc2;; // Increment slot
+ br.sptk.few RelocateBundleNextSlot
+
+RelocateBundleDone:
+ NESTED_RETURN
+
+ .endp RelocateBundle
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// RelocateSlot
+//
+// Description:
+// Relocates an instruction bundle by updating any ip-relative branch instructions.
+//
+// Arguments:
+// in0 - Instruction encoding (41-bits, right justified)
+// in1 - IP address of previous location of bundle
+// in2 - IP address of new location of bundle
+//
+// Returns:
+// in0 - Instruction encoding (41-bits, right justified)
+// in1 - 1 if successful otherwise 0
+//
+// Notes:
+// This procedure is a leaf routine
+//
+ .proc RelocateSlot
+
+RelocateSlot:
+ NESTED_SETUP(3,2+5,0,0)
+ extr.u loc2=in0, 37, 4;; // loc2 = instruction opcode
+ cmp.eq p14, p15 = 4, loc2;; // IP-relative branch (B1) or
+ // IP-relative counted branch (B2)
+(p15) cmp.eq p14, p15 = 5, loc2;; // IP-relative call (B3)
+(p15) cmp.eq p14, p15 = 7, loc2;; // IP-relative predict (B6)
+(p15) mov in1=1 // Instruction did not need to be reencoded
+(p15) br.sptk.few RelocateSlotDone
+ tbit.nz p14, p15 = in0, 36;; // put relative offset sign bit in p14
+ extr.u loc2=in0, 13, 20;; // loc2 = relative offset in instruction
+(p14) movl loc3=0xfffffffffff00000;; // extend sign
+(p14) or loc2=loc2, loc3;;
+ shl loc2=loc2,4;; // convert to byte offset instead of bundle offset
+ add loc3=loc2, in1;; // loc3 = physical address of branch target
+(p14) sub loc2=r0,loc2;; // flip sign in loc2 if offset is negative
+ sub loc4=loc3,in2;; // loc4 = relative offset from new ip to branch target
+ cmp.lt p15, p14 = 0, loc4;; // get new sign bit
+(p14) sub loc5=r0,loc4 // get absolute value of offset
+(p15) mov loc5=loc4;;
+ movl loc6=0x0FFFFFF;; // maximum offset in bytes for ip-rel branch
+ cmp.gt p14, p15 = loc5, loc6;; // check to see we're not out of range for an ip-relative branch
+(p14) br.sptk.few RelocateSlotError
+ cmp.lt p15, p14 = 0, loc4;; // store sign in p14 again
+(p14) dep in0=1,in0,36,1 // store sign bit in instruction
+(p15) dep in0=0,in0,36,1
+ shr loc4=loc4, 4;; // convert back to bundle offset
+ dep in0=loc4,in0,13,16;; // put first 16 bits of new offset into instruction
+ shr loc4=loc4,16;;
+ dep in0=loc4,in0,13+16,4 // put last 4 bits of new offset into instruction
+ mov in1=1;; // in1 = success
+ br.sptk.few RelocateSlotDone;;
+
+RelocateSlotError:
+ mov in1=0;; // in1 = failure
+
+RelocateSlotDone:
+ NESTED_RETURN
+
+ .endp RelocateSlot
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// IsSlotBranch
+//
+// Description:
+// Determines if the given instruction is a branch instruction.
+//
+// Arguments:
+// in0 - Instruction encoding (41-bits, right justified)
+// in1 - Instruction slot number
+// in2 - Bundle template
+//
+// Returns:
+// in0 - 1 if branch or 0 if not branch
+//
+// Notes:
+// This procedure is a leaf routine
+//
+// IsSlotBranch recognizes all branch instructions by looking at the provided template.
+// The instruction encoding is only passed to this routine for future expansion.
+//
+ .proc IsSlotBranch
+
+IsSlotBranch:
+
+ NESTED_SETUP (3,2+0,0,0)
+
+ mov in0=1;; // in0 = 1 which destroys the instruction
+ andcm in2=in2,in0;; // in2 = even template to reduce compares
+ mov in0=0;; // in0 = not a branch
+ cmp.eq p14, p15 = 0x16, in2;; // Template 0x16 is BBB
+(p14) br.sptk.few IsSlotBranchTrue
+ cmp.eq p14, p15 = SLOT0, in1;; // Slot 0 has no other possiblities
+(p14) br.sptk.few IsSlotBranchDone
+ cmp.eq p14, p15 = 0x12, in2;; // Template 0x12 is MBB
+(p14) br.sptk.few IsSlotBranchTrue
+ cmp.eq p14, p15 = SLOT1, in1;; // Slot 1 has no other possiblities
+(p14) br.sptk.few IsSlotBranchDone
+ cmp.eq p14, p15 = 0x10, in2;; // Template 0x10 is MIB
+(p14) br.sptk.few IsSlotBranchTrue
+ cmp.eq p14, p15 = 0x18, in2;; // Template 0x18 is MMB
+(p14) br.sptk.few IsSlotBranchTrue
+ cmp.eq p14, p15 = 0x1C, in2;; // Template 0x1C is MFB
+(p14) br.sptk.few IsSlotBranchTrue
+ br.sptk.few IsSlotBranchDone
+
+IsSlotBranchTrue:
+ mov in0=1;; // in0 = branch
+
+IsSlotBranchDone:
+ NESTED_RETURN
+
+ .endp IsSlotBranch
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// GetTemplate
+//
+// Description:
+// Retrieves the instruction template for an instruction bundle
+//
+// Arguments:
+// in0 - Runtime address of bundle
+//
+// Returns:
+// in0 - Instruction template (5-bits, right-justified)
+//
+// Notes:
+// This procedure is a leaf routine
+//
+ .proc GetTemplate
+
+GetTemplate:
+
+ NESTED_SETUP (1,2+2,0,0)
+
+ ld8 loc2=[in0], 0x8 // loc2 = first 8 bytes of branch bundle
+ movl loc3=MASK_0_4;; // loc3 = template mask
+ and loc2=loc2,loc3;; // loc2 = template, right justified
+ mov in0=loc2;; // in0 = template, right justified
+
+ NESTED_RETURN
+
+ .endp GetTemplate
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// GetSlot
+//
+// Description:
+// Gets the instruction encoding for an instruction slot and bundle
+//
+// Arguments:
+// in0 - Runtime address of bundle
+// in1 - Instruction slot (either 0, 1, or 2)
+//
+// Returns:
+// in0 - Instruction encoding (41-bits, right justified)
+//
+// Notes:
+// This procedure is a leaf routine
+//
+// Slot0 - [in0 + 0x8] Bits 45-5
+// Slot1 - [in0 + 0x8] Bits 63-46 and [in0] Bits 22-0
+// Slot2 - [in0] Bits 63-23
+//
+ .proc GetSlot
+
+GetSlot:
+ NESTED_SETUP (2,2+3,0,0)
+
+ ld8 loc2=[in0], 0x8;; // loc2 = first 8 bytes of branch bundle
+ ld8 loc3=[in0];; // loc3 = second 8 bytes of branch bundle
+ cmp.eq p14, p15 = 2, in1;; // check if slot 2 specified
+ (p14) br.cond.sptk.few GetSlot2;; // get slot 2
+ cmp.eq p14, p15 = 1, in1;; // check if slot 1 specified
+ (p14) br.cond.sptk.few GetSlot1;; // get slot 1
+
+GetSlot0:
+ extr.u in0=loc2, 5, 45 // in0 = extracted slot 0
+ br.sptk.few GetSlotDone;;
+
+GetSlot1:
+ extr.u in0=loc2, 46, 18 // in0 = bits 63-46 of loc2 right-justified
+ extr.u loc4=loc3, 0, 23;; // loc4 = bits 22-0 of loc3 right-justified
+ dep in0=loc4, in0, 18, 15;;
+ shr.u loc4=loc4,15;;
+ dep in0=loc4, in0, 33, 8;; // in0 = extracted slot 1
+ br.sptk.few GetSlotDone;;
+
+GetSlot2:
+ extr.u in0=loc3, 23, 41;; // in0 = extracted slot 2
+
+GetSlotDone:
+ NESTED_RETURN
+
+ .endp GetSlot
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// SetSlot
+//
+// Description:
+// Sets the instruction encoding for an instruction slot and bundle
+//
+// Arguments:
+// in0 - Runtime address of bundle
+// in1 - Instruction slot (either 0, 1, or 2)
+// in2 - Instruction encoding (41-bits, right justified)
+//
+// Returns:
+//
+// Notes:
+// This procedure is a leaf routine
+//
+ .proc SetSlot
+
+SetSlot:
+ NESTED_SETUP (3,2+3,0,0)
+
+ ld8 loc2=[in0], 0x8;; // loc2 = first 8 bytes of bundle
+ ld8 loc3=[in0];; // loc3 = second 8 bytes of bundle
+ cmp.eq p14, p15 = 2, in1;; // check if slot 2 specified
+ (p14) br.cond.sptk.few SetSlot2;; // set slot 2
+ cmp.eq p14, p15 = 1, in1;; // check if slot 1 specified
+ (p14) br.cond.sptk.few SetSlot1;; // set slot 1
+
+SetSlot0:
+ dep loc2=0, loc2, 5, 41;; // remove old instruction from slot 0
+ shl loc4=in2, 5;; // loc4 = new instruction ready to be inserted
+ or loc2=loc2, loc4;; // loc2 = updated first 8 bytes of bundle
+ add loc4=0x8,in0;; // loc4 = address to store first 8 bytes of bundle
+ st8 [loc4]=loc2 // [loc4] = updated bundle
+ br.sptk.few SetSlotDone;;
+ ;;
+
+SetSlot1:
+ dep loc2=0, loc2, 46, 18 // remove old instruction from slot 1
+ dep loc3=0, loc3, 0, 23;;
+ shl loc4=in2, 46;; // loc4 = partial instruction ready to be inserted
+ or loc2=loc2, loc4;; // loc2 = updated first 8 bytes of bundle
+ add loc4=0x8,in0;; // loc4 = address to store first 8 bytes of bundle
+ st8 [loc4]=loc2;; // [loc4] = updated bundle
+ shr.u loc4=in2, 18;; // loc4 = partial instruction ready to be inserted
+ or loc3=loc3, loc4;; // loc3 = updated second 8 bytes of bundle
+ st8 [in0]=loc3;; // [in0] = updated bundle
+ br.sptk.few SetSlotDone;;
+
+SetSlot2:
+ dep loc3=0, loc3, 23, 41;; // remove old instruction from slot 2
+ shl loc4=in2, 23;; // loc4 = instruction ready to be inserted
+ or loc3=loc3, loc4;; // loc3 = updated second 8 bytes of bundle
+ st8 [in0]=loc3;; // [in0] = updated bundle
+
+SetSlotDone:
+
+ NESTED_RETURN
+ .endp SetSlot
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// GetIva
+//
+// Description:
+// C callable function to obtain the current value of IVA
+//
+// Returns:
+// Current value if IVA
+
+ .global GetIva
+ .proc GetIva
+GetIva:
+ mov r8=cr2;;
+ br.ret.sptk.many b0
+
+ .endp GetIva
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// ProgramInterruptFlags
+//
+// Description:
+// C callable function to enable/disable interrupts
+//
+// Returns:
+// Previous state of psr.ic
+//
+ .global ProgramInterruptFlags
+ .proc ProgramInterruptFlags
+ProgramInterruptFlags:
+ alloc loc0=1,2,0,0;;
+ mov loc0=psr
+ mov loc1=0x6000;;
+ and r8=loc0, loc1 // obtain current psr.ic and psr.i state
+ and in0=in0, loc1 // insure no extra bits set in input
+ andcm loc0=loc0,loc1;; // clear original psr.i and psr.ic
+ or loc0=loc0,in0;; // OR in new psr.ic value
+ mov psr.l=loc0;; // write new psr
+ srlz.d
+ br.ret.sptk.many b0 // return
+
+ .endp ProgramInterruptFlags
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// SpillContext
+//
+// Description:
+// Saves system context to context record.
+//
+// Arguments:
+// in0 = 512 byte aligned context record address
+// in1 = original B0
+// in2 = original ar.bsp
+// in3 = original ar.bspstore
+// in4 = original ar.rnat
+// in5 = original ar.pfs
+//
+// Notes:
+// loc0 - scratch
+// loc1 - scratch
+// loc2 - temporary application unat storage
+// loc3 - temporary exception handler unat storage
+
+ .proc SpillContext
+
+SpillContext:
+ alloc loc0=6,4,0,0;; // alloc 6 input, 4 locals, 0 outs
+ mov loc2=ar.unat;; // save application context unat (spilled later)
+ mov ar.unat=r0;; // set UNAT=0
+ st8.spill [in0]=r0,8;;
+ st8.spill [in0]=r1,8;; // save R1 - R31
+ st8.spill [in0]=r2,8;;
+ st8.spill [in0]=r3,8;;
+ st8.spill [in0]=r4,8;;
+ st8.spill [in0]=r5,8;;
+ st8.spill [in0]=r6,8;;
+ st8.spill [in0]=r7,8;;
+ st8.spill [in0]=r8,8;;
+ st8.spill [in0]=r9,8;;
+ st8.spill [in0]=r10,8;;
+ st8.spill [in0]=r11,8;;
+ st8.spill [in0]=r12,8;;
+ st8.spill [in0]=r13,8;;
+ st8.spill [in0]=r14,8;;
+ st8.spill [in0]=r15,8;;
+ st8.spill [in0]=r16,8;;
+ st8.spill [in0]=r17,8;;
+ st8.spill [in0]=r18,8;;
+ st8.spill [in0]=r19,8;;
+ st8.spill [in0]=r20,8;;
+ st8.spill [in0]=r21,8;;
+ st8.spill [in0]=r22,8;;
+ st8.spill [in0]=r23,8;;
+ st8.spill [in0]=r24,8;;
+ st8.spill [in0]=r25,8;;
+ st8.spill [in0]=r26,8;;
+ st8.spill [in0]=r27,8;;
+ st8.spill [in0]=r28,8;;
+ st8.spill [in0]=r29,8;;
+ st8.spill [in0]=r30,8;;
+ st8.spill [in0]=r31,8;;
+ mov loc3=ar.unat;; // save debugger context unat (spilled later)
+ stf.spill [in0]=f2,16;; // save f2 - f31
+ stf.spill [in0]=f3,16;;
+ stf.spill [in0]=f4,16;;
+ stf.spill [in0]=f5,16;;
+ stf.spill [in0]=f6,16;;
+ stf.spill [in0]=f7,16;;
+ stf.spill [in0]=f8,16;;
+ stf.spill [in0]=f9,16;;
+ stf.spill [in0]=f10,16;;
+ stf.spill [in0]=f11,16;;
+ stf.spill [in0]=f12,16;;
+ stf.spill [in0]=f13,16;;
+ stf.spill [in0]=f14,16;;
+ stf.spill [in0]=f15,16;;
+ stf.spill [in0]=f16,16;;
+ stf.spill [in0]=f17,16;;
+ stf.spill [in0]=f18,16;;
+ stf.spill [in0]=f19,16;;
+ stf.spill [in0]=f20,16;;
+ stf.spill [in0]=f21,16;;
+ stf.spill [in0]=f22,16;;
+ stf.spill [in0]=f23,16;;
+ stf.spill [in0]=f24,16;;
+ stf.spill [in0]=f25,16;;
+ stf.spill [in0]=f26,16;;
+ stf.spill [in0]=f27,16;;
+ stf.spill [in0]=f28,16;;
+ stf.spill [in0]=f29,16;;
+ stf.spill [in0]=f30,16;;
+ stf.spill [in0]=f31,16;;
+ mov loc0=pr;; // save predicates
+ st8.spill [in0]=loc0,8;;
+ st8.spill [in0]=in1,8;; // save b0 - b7... in1 already equals saved b0
+ mov loc0=b1;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=b2;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=b3;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=b4;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=b5;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=b6;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=b7;;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.rsc;; // save ar.rsc
+ st8.spill [in0]=loc0,8;;
+ st8.spill [in0]=in2,8;; // save ar.bsp (in2)
+ st8.spill [in0]=in3,8;; // save ar.bspstore (in3)
+ st8.spill [in0]=in4,8;; // save ar.rnat (in4)
+ mov loc0=ar.fcr;; // save ar.fcr (ar21 - IA32 floating-point control register)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.eflag;; // save ar.eflag (ar24)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.csd;; // save ar.csd (ar25 - ia32 CS descriptor)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.ssd;; // save ar.ssd (ar26 - ia32 ss descriptor)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.cflg;; // save ar.cflg (ar27 - ia32 cr0 and cr4)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.fsr;; // save ar.fsr (ar28 - ia32 floating-point status register)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.fir;; // save ar.fir (ar29 - ia32 floating-point instruction register)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.fdr;; // save ar.fdr (ar30 - ia32 floating-point data register)
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.ccv;; // save ar.ccv
+ st8.spill [in0]=loc0,8;;
+ st8.spill [in0]=loc2,8;; // save ar.unat (saved to loc2 earlier)
+ mov loc0=ar.fpsr;; // save floating point status register
+ st8.spill [in0]=loc0,8;;
+ st8.spill [in0]=in5,8;; // save ar.pfs
+ mov loc0=ar.lc;; // save ar.lc
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ar.ec;; // save ar.ec
+ st8.spill [in0]=loc0,8;;
+
+ // save control registers
+ mov loc0=cr.dcr;; // save dcr
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.itm;; // save itm
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.iva;; // save iva
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.pta;; // save pta
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.ipsr;; // save ipsr
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.isr;; // save isr
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.iip;; // save iip
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.ifa;; // save ifa
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.itir;; // save itir
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.iipa;; // save iipa
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.ifs;; // save ifs
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.iim;; // save iim
+ st8.spill [in0]=loc0,8;;
+ mov loc0=cr.iha;; // save iha
+ st8.spill [in0]=loc0,8;;
+
+ // save debug registers
+ mov loc0=dbr[r0];; // save dbr0 - dbr7
+ st8.spill [in0]=loc0,8;;
+ movl loc1=1;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=2;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=3;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=4;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=5;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=6;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=7;;
+ mov loc0=dbr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ mov loc0=ibr[r0];; // save ibr0 - ibr7
+ st8.spill [in0]=loc0,8;;
+ movl loc1=1;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=2;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=3;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=4;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=5;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=6;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ movl loc1=7;;
+ mov loc0=ibr[loc1];;
+ st8.spill [in0]=loc0,8;;
+ st8.spill [in0]=loc3;;
+
+ br.ret.sptk.few b0
+
+ .endp SpillContext
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// FillContext
+//
+// Description:
+// Restores register context from context record.
+//
+// Arguments:
+// in0 = address of last element 512 byte aligned context record address
+// in1 = modified B0
+// in2 = modified ar.bsp
+// in3 = modified ar.bspstore
+// in4 = modified ar.rnat
+// in5 = modified ar.pfs
+//
+// Notes:
+// loc0 - scratch
+// loc1 - scratch
+// loc2 - temporary application unat storage
+// loc3 - temporary exception handler unat storage
+
+ .proc FillContext
+FillContext:
+ alloc loc0=6,4,0,0;; // alloc 6 inputs, 4 locals, 0 outs
+ ld8.fill loc3=[in0],-8;; // int_nat (nat bits for R1-31)
+ movl loc1=7;; // ibr7
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ movl loc1=6;; // ibr6
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ movl loc1=5;; // ibr5
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ movl loc1=4;; // ibr4
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ movl loc1=3;; // ibr3
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ movl loc1=2;; // ibr2
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ movl loc1=1;; // ibr1
+ ld8.fill loc0=[in0],-8;;
+ mov ibr[loc1]=loc0;;
+ ld8.fill loc0=[in0],-8;; // ibr0
+ mov ibr[r0]=loc0;;
+ movl loc1=7;; // dbr7
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ movl loc1=6;; // dbr6
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ movl loc1=5;; // dbr5
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ movl loc1=4;; // dbr4
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ movl loc1=3;; // dbr3
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ movl loc1=2;; // dbr2
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ movl loc1=1;; // dbr1
+ ld8.fill loc0=[in0],-8;;
+ mov dbr[loc1]=loc0;;
+ ld8.fill loc0=[in0],-8;; // dbr0
+ mov dbr[r0]=loc0;;
+ ld8.fill loc0=[in0],-8;; // iha
+ mov cr.iha=loc0;;
+ ld8.fill loc0=[in0],-8;; // iim
+ mov cr.iim=loc0;;
+ ld8.fill loc0=[in0],-8;; // ifs
+ mov cr.ifs=loc0;;
+ ld8.fill loc0=[in0],-8;; // iipa
+ mov cr.iipa=loc0;;
+ ld8.fill loc0=[in0],-8;; // itir
+ mov cr.itir=loc0;;
+ ld8.fill loc0=[in0],-8;; // ifa
+ mov cr.ifa=loc0;;
+ ld8.fill loc0=[in0],-8;; // iip
+ mov cr.iip=loc0;;
+ ld8.fill loc0=[in0],-8;; // isr
+ mov cr.isr=loc0;;
+ ld8.fill loc0=[in0],-8;; // ipsr
+ mov cr.ipsr=loc0;;
+ ld8.fill loc0=[in0],-8;; // pta
+ mov cr.pta=loc0;;
+ ld8.fill loc0=[in0],-8;; // iva
+ mov cr.iva=loc0;;
+ ld8.fill loc0=[in0],-8;; // itm
+ mov cr.itm=loc0;;
+ ld8.fill loc0=[in0],-8;; // dcr
+ mov cr.dcr=loc0;;
+ ld8.fill loc0=[in0],-8;; // ec
+ mov ar.ec=loc0;;
+ ld8.fill loc0=[in0],-8;; // lc
+ mov ar.lc=loc0;;
+ ld8.fill in5=[in0],-8;; // ar.pfs
+ ld8.fill loc0=[in0],-8;; // ar.fpsr
+ mov ar.fpsr=loc0;;
+ ld8.fill loc2=[in0],-8;; // ar.unat - restored later...
+ ld8.fill loc0=[in0],-8;; // ar.ccv
+ mov ar.ccv=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.fdr
+ mov ar.fdr=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.fir
+ mov ar.fir=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.fsr
+ mov ar.fsr=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.cflg
+ mov ar.cflg=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.ssd
+ mov ar.ssd=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.csd
+ mov ar.csd=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.eflag
+ mov ar.eflag=loc0;;
+ ld8.fill loc0=[in0],-8;; // ar.fcr
+ mov ar.fcr=loc0;;
+ ld8.fill in4=[in0],-8;; // ar.rnat
+ ld8.fill in3=[in0],-8;; // bspstore
+ ld8.fill in2=[in0],-8;; // bsp
+ ld8.fill loc0=[in0],-8;; // ar.rsc
+ mov ar.rsc=loc0;;
+ ld8.fill loc0=[in0],-8;; // B7 - B0
+ mov b7=loc0;;
+ ld8.fill loc0=[in0],-8;;
+ mov b6=loc0;;
+ ld8.fill loc0=[in0],-8;;
+ mov b5=loc0;;
+ ld8.fill loc0=[in0],-8;;
+ mov b4=loc0;;
+ ld8.fill loc0=[in0],-8;;
+ mov b3=loc0;;
+ ld8.fill loc0=[in0],-8;;
+ mov b2=loc0;;
+ ld8.fill loc0=[in0],-8;;
+ mov b1=loc0;;
+ ld8.fill in1=[in0],-8;; // b0 is temporarily stored in in1
+ ld8.fill loc0=[in0],-16;; // predicates
+ mov pr=loc0;;
+ ldf.fill f31=[in0],-16;;
+ ldf.fill f30=[in0],-16;;
+ ldf.fill f29=[in0],-16;;
+ ldf.fill f28=[in0],-16;;
+ ldf.fill f27=[in0],-16;;
+ ldf.fill f26=[in0],-16;;
+ ldf.fill f25=[in0],-16;;
+ ldf.fill f24=[in0],-16;;
+ ldf.fill f23=[in0],-16;;
+ ldf.fill f22=[in0],-16;;
+ ldf.fill f21=[in0],-16;;
+ ldf.fill f20=[in0],-16;;
+ ldf.fill f19=[in0],-16;;
+ ldf.fill f18=[in0],-16;;
+ ldf.fill f17=[in0],-16;;
+ ldf.fill f16=[in0],-16;;
+ ldf.fill f15=[in0],-16;;
+ ldf.fill f14=[in0],-16;;
+ ldf.fill f13=[in0],-16;;
+ ldf.fill f12=[in0],-16;;
+ ldf.fill f11=[in0],-16;;
+ ldf.fill f10=[in0],-16;;
+ ldf.fill f9=[in0],-16;;
+ ldf.fill f8=[in0],-16;;
+ ldf.fill f7=[in0],-16;;
+ ldf.fill f6=[in0],-16;;
+ ldf.fill f5=[in0],-16;;
+ ldf.fill f4=[in0],-16;;
+ ldf.fill f3=[in0],-16;;
+ ldf.fill f2=[in0],-8;;
+ mov ar.unat=loc3;; // restore unat (int_nat) before fill of general registers
+ ld8.fill r31=[in0],-8;;
+ ld8.fill r30=[in0],-8;;
+ ld8.fill r29=[in0],-8;;
+ ld8.fill r28=[in0],-8;;
+ ld8.fill r27=[in0],-8;;
+ ld8.fill r26=[in0],-8;;
+ ld8.fill r25=[in0],-8;;
+ ld8.fill r24=[in0],-8;;
+ ld8.fill r23=[in0],-8;;
+ ld8.fill r22=[in0],-8;;
+ ld8.fill r21=[in0],-8;;
+ ld8.fill r20=[in0],-8;;
+ ld8.fill r19=[in0],-8;;
+ ld8.fill r18=[in0],-8;;
+ ld8.fill r17=[in0],-8;;
+ ld8.fill r16=[in0],-8;;
+ ld8.fill r15=[in0],-8;;
+ ld8.fill r14=[in0],-8;;
+ ld8.fill r13=[in0],-8;;
+ ld8.fill r12=[in0],-8;;
+ ld8.fill r11=[in0],-8;;
+ ld8.fill r10=[in0],-8;;
+ ld8.fill r9=[in0],-8;;
+ ld8.fill r8=[in0],-8;;
+ ld8.fill r7=[in0],-8;;
+ ld8.fill r6=[in0],-8;;
+ ld8.fill r5=[in0],-8;;
+ ld8.fill r4=[in0],-8;;
+ ld8.fill r3=[in0],-8;;
+ ld8.fill r2=[in0],-8;;
+ ld8.fill r1=[in0],-8;;
+ mov ar.unat=loc2;; // restore application context unat
+
+ br.ret.sptk.many b0
+
+ .endp FillContext
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// HookHandler
+//
+// Description:
+// Common branch target from hooked IVT entries. Runs in interrupt context.
+// Responsible for saving and restoring context and calling common C
+// handler. Banked registers running on bank 0 at entry.
+//
+// Arguments:
+// All arguments are passed in banked registers:
+// B0_REG = Original B0
+// SCRATCH_REG1 = IVT entry index
+//
+// Returns:
+// Returns via rfi
+//
+// Notes:
+// loc0 - scratch
+// loc1 - scratch
+// loc2 - vector number / mask
+// loc3 - 16 byte aligned context record address
+// loc4 - temporary storage of last address in context record
+
+HookHandler:
+ flushrs;; // Synch RSE with backing store
+ mov SCRATCH_REG2=ar.bsp // save interrupted context bsp
+ mov SCRATCH_REG3=ar.bspstore // save interrupted context bspstore
+ mov SCRATCH_REG4=ar.rnat // save interrupted context rnat
+ mov SCRATCH_REG6=cr.ifs;; // save IFS in case we need to chain...
+ cover;; // creates new frame, moves old
+ // CFM to IFS.
+ alloc SCRATCH_REG5=0,5,6,0 // alloc 5 locals, 6 outs
+ ;;
+ // save banked registers to locals
+ mov out1=B0_REG // out1 = Original B0
+ mov out2=SCRATCH_REG2 // out2 = original ar.bsp
+ mov out3=SCRATCH_REG3 // out3 = original ar.bspstore
+ mov out4=SCRATCH_REG4 // out4 = original ar.rnat
+ mov out5=SCRATCH_REG5 // out5 = original ar.pfs
+ mov loc2=SCRATCH_REG1;; // loc2 = vector number + chain flag
+ bsw.1;; // switch banked registers to bank 1
+ srlz.d // explicit serialize required
+ // now fill in context record structure
+ movl loc3=IpfContextBuf // Insure context record is aligned
+ add loc0=-0x200,r0;; // mask the lower 9 bits (align on 512 byte boundary)
+ and loc3=loc3,loc0;;
+ add loc3=0x200,loc3;; // move to next 512 byte boundary
+ // loc3 now contains the 512 byte aligned context record
+ // spill register context into context record
+ mov out0=loc3;; // Context record base in out0
+ // original B0 in out1 already
+ // original ar.bsp in out2 already
+ // original ar.bspstore in out3 already
+ br.call.sptk.few b0=SpillContext;; // spill context
+ mov loc4=out0 // save modified address
+
+ // At this point, the context has been saved to the context record and we're
+ // ready to call the C part of the handler...
+
+ movl loc0=CommonHandler;; // obtain address of plabel
+ ld8 loc1=[loc0];; // get entry point of CommonHandler
+ mov b6=loc1;; // put it in a branch register
+ adds loc1= 8, loc0;; // index to GP in plabel
+ ld8 r1=[loc1];; // set up gp for C call
+ mov loc1=0xfffff;; // mask off so only vector bits are present
+ and out0=loc2,loc1;; // pass vector number (exception type)
+ mov out1=loc3;; // pass context record address
+ br.call.sptk.few b0=b6;; // call C handler
+
+ // We've returned from the C call, so restore the context and either rfi
+ // back to interrupted thread, or chain into the SAL if this was an external interrupt
+ mov out0=loc4;; // pass address of last element in context record
+ br.call.sptk.few b0=FillContext;; // Fill context
+ mov b0=out1 // fill in b0
+ mov ar.rnat=out4
+ mov ar.pfs=out5
+
+ // Loadrs is necessary because the debugger may have changed some values in
+ // the backing store. The processor, however may not be aware that the
+ // stacked registers need to be reloaded from the backing store. Therefore,
+ // we explicitly cause the RSE to refresh the stacked register's contents
+ // from the backing store.
+ mov loc0=ar.rsc // get RSC value
+ mov loc1=ar.rsc // save it so we can restore it
+ movl loc3=0xffffffffc000ffff;; // create mask for clearing RSC.loadrs
+ and loc0=loc0,loc3;; // create value for RSC with RSC.loadrs==0
+ mov ar.rsc=loc0;; // modify RSC
+ loadrs;; // invalidate register stack
+ mov ar.rsc=loc1;; // restore original RSC
+
+ bsw.0;; // switch banked registers back to bank 0
+ srlz.d;; // explicit serialize required
+ mov PR_REG=pr // save predicates - to be restored after chaining decision
+ mov B0_REG=b0 // save b0 - required by chain code
+ mov loc2=EXCPT_EXTERNAL_INTERRUPT;;
+ cmp.eq p7,p0=SCRATCH_REG1,loc2;; // check to see if this is the timer tick
+ (p7) br.cond.dpnt.few DO_CHAIN;;
+
+NO_CHAIN:
+ mov pr=PR_REG;;
+ rfi;; // we're outa here.
+
+DO_CHAIN:
+ mov pr=PR_REG
+ mov SCRATCH_REG1=cr.iva
+ mov SCRATCH_REG2=PATCH_RETURN_OFFSET;;
+ add SCRATCH_REG1=SCRATCH_REG1, SCRATCH_REG2;;
+ mov b0=SCRATCH_REG1;;
+ br.cond.sptk.few b0;;
+
+EndHookHandler:
+
+
+/////////////////////////////////////////////
+//
+// Name:
+// HookStub
+//
+// Description:
+// HookStub will be copied from it's loaded location into the IVT when
+// an IVT entry is hooked. The IVT entry does an indirect jump via B0 to
+// HookHandler, which in turn calls into the default C handler, which calls
+// the user-installed C handler. The calls return and HookHandler executes
+// an rfi.
+//
+// Notes:
+// Saves B0 to B0_REG
+// Saves IVT index to SCRATCH_REG1 (immediate value is fixed up when code is copied
+// to the IVT entry.
+
+ .global HookStub
+ .proc HookStub
+HookStub:
+
+ mov B0_REG=b0
+ movl SCRATCH_REG1=HookHandler;;
+ mov b0=SCRATCH_REG1;;
+ mov SCRATCH_REG1=0;;// immediate value is fixed up during install of handler to be the vector number
+ br.cond.sptk.few b0
+
+ .endp HookStub
+
+
+/////////////////////////////////////////////
+// The following code is moved into IVT entry 14 (offset 3400) which is reserved
+// in the Itanium architecture. The patch code is located at the end of the
+// IVT entry.
+
+PatchCode:
+ mov SCRATCH_REG0=psr
+ mov SCRATCH_REG6=cr.ipsr
+ mov PR_REG=pr
+ mov B0_REG=b0;;
+
+ // turn off any virtual translations
+ movl SCRATCH_REG1 = ~( MASK(PSR_DT,1) | MASK(PSR_RT,1));;
+ and SCRATCH_REG1 = SCRATCH_REG0, SCRATCH_REG1;;
+ mov psr.l = SCRATCH_REG1;;
+ srlz.d
+ tbit.z p14, p15 = SCRATCH_REG6, PSR_IS;; // Check to see if we were
+ // interrupted from IA32
+ // context. If so, bail out
+ // and chain to SAL immediately
+ (p15) br.cond.sptk.few Stub_IVT_Passthru;;
+ // we only want to take 1 out of 32 external interrupts to minimize the
+ // impact to system performance. Check our interrupt count and bail
+ // out if we're not up to 32
+ movl SCRATCH_REG1=ExternalInterruptCount;;
+ ld8 SCRATCH_REG2=[SCRATCH_REG1];; // ExternalInterruptCount
+ tbit.z p14, p15 = SCRATCH_REG2, 5;; // bit 5 set?
+ (p14) add SCRATCH_REG2=1, SCRATCH_REG2;; // No? Then increment
+ // ExternalInterruptCount
+ // and Chain to SAL
+ // immediately
+ (p14) st8 [SCRATCH_REG1]=SCRATCH_REG2;;
+ (p14) br.cond.sptk.few Stub_IVT_Passthru;;
+ (p15) mov SCRATCH_REG2=0;; // Yes? Then reset
+ // ExternalInterruptCount
+ // and branch to
+ // HookHandler
+ (p15) st8 [SCRATCH_REG1]=SCRATCH_REG2;;
+ mov pr=PR_REG
+ movl SCRATCH_REG1=HookHandler;; // SCRATCH_REG1 = entrypoint of HookHandler
+ mov b0=SCRATCH_REG1;; // b0 = entrypoint of HookHandler
+ mov SCRATCH_REG1=EXCPT_EXTERNAL_INTERRUPT;;
+ br.sptk.few b0;; // branch to HookHandler
+
+PatchCodeRet:
+ // fake-up an rfi to get RSE back to being coherent and insure psr has
+ // original contents when interrupt occured, then exit to SAL
+ // at this point:
+ // cr.ifs has been modified by previous "cover"
+ // SCRATCH_REG6 has original cr.ifs
+
+ mov SCRATCH_REG5=cr.ipsr
+ mov SCRATCH_REG4=cr.iip;;
+ mov cr.ipsr=SCRATCH_REG0
+ mov SCRATCH_REG1=ip;;
+ add SCRATCH_REG1=0x30, SCRATCH_REG1;;
+ mov cr.iip=SCRATCH_REG1;;
+ rfi;; // rfi to next instruction
+
+Stub_RfiTarget:
+ mov cr.ifs=SCRATCH_REG6
+ mov cr.ipsr=SCRATCH_REG5
+ mov cr.iip=SCRATCH_REG4;;
+
+Stub_IVT_Passthru:
+ mov pr=PR_REG // pr = saved predicate registers
+ mov b0=B0_REG;; // b0 = saved b0
+EndPatchCode:
+
+
+/////////////////////////////////////////////
+// The following bundle is moved into IVT entry 14 (offset 0x3400) which is reserved
+// in the Itanium architecture. This bundle will be the last bundle and will
+// be located at offset 0x37F0 in the IVT.
+
+FailsafeBranch:
+{
+ .mib
+ nop.m 0
+ nop.i 0
+ br.sptk.few -(FAILSAFE_BRANCH_OFFSET - EXT_INT_ENTRY_OFFSET - 0x10)
+}
+
+
+/////////////////////////////////////////////
+// The following bundle is moved into IVT entry 13 (offset 0x3000) which is the
+// external interrupt. It branches to the patch code.
+
+PatchCodeNewBun0:
+{
+ .mib
+ nop.m 0
+ nop.i 0
+ br.cond.sptk.few PATCH_BRANCH
+}
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/Ds64Macros.i b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/Ds64Macros.i new file mode 100644 index 0000000..6088ce7 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/Ds64Macros.i @@ -0,0 +1,85 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// Ds64Macros.i
+//
+// Abstract:
+//
+// This is set of macros used in calculating offsets in the IVT
+//
+// Revision History:
+//
+//--
+
+#define EXCPT_EXTERNAL_INTERRUPT 12
+#define MASK_0_4 0x000000000000001F // mask bits 0 through 4
+#define SLOT0 0
+#define SLOT1 1
+#define SLOT2 2
+
+#define PSR_DT 17
+#define PSR_TB 26
+#define PSR_RT 27
+#define PSR_IS 34
+#define PSR_IT 36
+#define PSR_IC 13
+#define PSR_I 14
+#define PSR_SS 40
+#define PSR_BN 44
+#define PSR_RI_MASK 0x60000000000
+
+#define EXCPT_EXTERNAL_INTERRUPT 12
+
+#define SCRATCH_REG0 r23
+#define SCRATCH_REG1 r24
+#define SCRATCH_REG2 r25
+#define SCRATCH_REG3 r26
+#define SCRATCH_REG4 r27
+#define SCRATCH_REG5 r28
+#define SCRATCH_REG6 r29
+#define PR_REG r30
+#define B0_REG r31
+
+
+// EXT_INT_OFFSET is the offset of the external interrupt entry in the IVT
+#define EXT_INT_ENTRY_OFFSET 0x03000
+
+// PATCH_ENTRY_OFFSET is the offset into the IVT of the entry that is coopted (stolen)
+// for use by the handler. The entire entry is restored when the handler is
+// unloaded.
+#define PATCH_ENTRY_OFFSET 0x03400
+
+// PATCH_BUNDLES is the number of bundles actually in the patch
+#define NUM_PATCH_BUNDLES ((EndPatchCode - PatchCode) / 0x10)
+
+// A hard coded branch back into the external interrupt IVT entry's second bundle
+// is put here, just in case the original bundle zero did not have a branch
+// This is the last bundle in the reserved IVT entry
+#define FAILSAFE_BRANCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - 0x10)
+
+// the original external interrupt IVT entry bundle zero is copied and relocated
+// here... also in the reserved IVT entry
+// This is the second-to-last bundle in the reserved IVT entry
+#define RELOCATED_EXT_INT (PATCH_ENTRY_OFFSET + 0x400 - 0x20)
+
+// The patch is actually stored at the end of IVT:PATCH_ENTRY. The PATCH_OFFSET
+// is the offset into IVT where the patch is actually stored. It is carefully
+// located so that when we run out of patch code, the next bundle is the
+// relocated bundle 0 from the original external interrupt handler
+#define PATCH_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCode ) - 0x20)
+
+#define PATCH_RETURN_OFFSET (PATCH_ENTRY_OFFSET + 0x400 - ( EndPatchCode - PatchCodeRet ) - 0x20)
+
+// PATCH_BRANCH is used only in the new bundle that is placed at the beginning
+// of the external interrupt IVT entry.
+#define PATCH_BRANCH (PATCH_OFFSET - EXT_INT_ENTRY_OFFSET)
+
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/common.i b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/common.i new file mode 100644 index 0000000..a7b571b --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/common.i @@ -0,0 +1,34 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// Common.i
+//
+// Abstract:
+//
+// This is set of useful macros
+//
+// Revision History:
+//
+//--
+
+#define NESTED_SETUP(i,l,o,r) \
+ alloc loc1=ar##.##pfs,i,l,o,r ; \
+ mov loc0=b0 ;;
+
+
+#define NESTED_RETURN \
+ mov b0=loc0 ; \
+ mov ar##.##pfs=loc1 ;; \
+ br##.##ret##.##dpnt b0 ;;
+
+#define MASK(bp,value) (value << bp)
+
diff --git a/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/plDebugSupport.c b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/plDebugSupport.c new file mode 100644 index 0000000..6f2ded2 --- /dev/null +++ b/EdkModulePkg/Universal/DebugSupport/Dxe/ipf/plDebugSupport.c @@ -0,0 +1,625 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ PlDebugSupport.c
+
+Abstract:
+
+ IPF specific debug support functions
+
+Revision History
+
+--*/
+
+//
+// Master EFI header file
+//
+#include "Tiano.h"
+
+//
+// Common library header files
+//
+#include "EfiDriverLib.h"
+
+//
+// Produced protocols
+//
+#include EFI_PROTOCOL_DEFINITION (DebugSupport)
+
+//
+// private header files
+//
+#include "plDebugSupport.h"
+
+typedef struct {
+ UINT64 low;
+ UINT64 high;
+} BUNDLE;
+
+//
+// number of bundles to swap in ivt
+//
+#define NUM_BUNDLES_IN_STUB 5
+#define NUM_IVT_ENTRIES 64
+
+typedef struct {
+ BUNDLE OrigBundles[NUM_BUNDLES_IN_STUB];
+ VOID (*RegisteredCallback) ();
+} IVT_ENTRY;
+
+STATIC
+EFI_STATUS
+ManageIvtEntryTable (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN BUNDLE NewBundles[4],
+ IN VOID (*NewCallback) ()
+ );
+
+STATIC
+VOID
+HookEntry (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN BUNDLE NewBundles[4],
+ IN VOID (*NewCallback) ()
+ );
+
+STATIC
+VOID
+UnhookEntry (
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ );
+
+STATIC
+VOID
+ChainExternalInterrupt (
+ IN VOID (*NewCallback) ()
+ );
+
+STATIC
+VOID
+UnchainExternalInterrupt (
+ VOID
+ );
+
+STATIC
+VOID
+GetHandlerEntryPoint (
+ UINTN HandlerIndex,
+ VOID **EntryPoint
+ );
+
+IVT_ENTRY IvtEntryTable[NUM_IVT_ENTRIES];
+
+//
+// IPF context record is overallocated by 512 bytes to guarantee a 512 byte alignment exists
+// within the buffer and still have a large enough buffer to hold a whole IPF context record.
+//
+UINT8 IpfContextBuf[sizeof (EFI_SYSTEM_CONTEXT_IPF) + 512];
+
+//
+// The PatchSaveBuffer is used to store the original bundles from the IVT where it is patched
+// with the common handler.
+//
+UINT8 PatchSaveBuffer[0x400];
+UINTN ExternalInterruptCount;
+
+EFI_STATUS
+plInitializeDebugSupportDriver (
+ VOID
+ )
+/*++
+
+Routine Description:
+ IPF specific DebugSupport driver initialization. Must be public because it's
+ referenced from DebugSupport.c
+
+Arguments:
+
+Returns:
+
+ EFI_SUCCESS
+
+--*/
+{
+ gBS->SetMem (IvtEntryTable, sizeof (IvtEntryTable), 0);
+ ExternalInterruptCount = 0;
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+EFIAPI
+plUnloadDebugSupportDriver (
+ IN EFI_HANDLE ImageHandle
+ )
+/*++
+
+Routine Description:
+ Unload handler that is called during UnloadImage() - deallocates pool memory
+ used by the driver. Must be public because it's referenced from DebugSuport.c
+
+Arguments:
+ IN EFI_HANDLE ImageHandle
+
+Returns:
+
+ EFI_STATUS - anything other than EFI_SUCCESS indicates the callback was not registered.
+
+--*/
+// TODO: ImageHandle - add argument and description to function comment
+{
+ EFI_EXCEPTION_TYPE ExceptionType;
+
+ for (ExceptionType = 0; ExceptionType < NUM_IVT_ENTRIES; ExceptionType++) {
+ ManageIvtEntryTable (ExceptionType, NULL, NULL);
+ }
+
+ return EFI_SUCCESS;
+}
+
+VOID
+CommonHandler (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN EFI_SYSTEM_CONTEXT Context
+ )
+/*++
+
+Routine Description:
+ C routine that is called for all registered exceptions. This is the main
+ exception dispatcher. Must be public because it's referenced from AsmFuncs.s.
+
+Arguments:
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN EFI_SYSTEM_CONTEXT Context
+
+Returns:
+
+ Nothing
+
+--*/
+// TODO: ExceptionType - add argument and description to function comment
+// TODO: Context - add argument and description to function comment
+{
+ static BOOLEAN InHandler = FALSE;
+
+ DEBUG_CODE (
+ if (InHandler) {
+ EfiDebugPrint (EFI_D_GENERIC, "ERROR: Re-entered debugger!\n"
+ " ExceptionType == %X\n"
+ " Context == %X\n"
+ " Context.SystemContextIpf->CrIip == %X\n"
+ " Context.SystemContextIpf->CrIpsr == %X\n"
+ " InHandler == %X\n",
+ ExceptionType,
+ Context,
+ Context.SystemContextIpf->CrIip,
+ Context.SystemContextIpf->CrIpsr,
+ InHandler);
+ }
+ )
+ ASSERT (!InHandler);
+ InHandler = TRUE;
+ if (IvtEntryTable[ExceptionType].RegisteredCallback != NULL) {
+ if (ExceptionType != EXCEPT_IPF_EXTERNAL_INTERRUPT) {
+ IvtEntryTable[ExceptionType].RegisteredCallback (ExceptionType, Context.SystemContextIpf);
+ } else {
+ IvtEntryTable[ExceptionType].RegisteredCallback (Context.SystemContextIpf);
+ }
+ } else {
+ ASSERT (0);
+ }
+
+ InHandler = FALSE;
+}
+
+STATIC
+VOID
+GetHandlerEntryPoint (
+ UINTN HandlerIndex,
+ VOID **EntryPoint
+ )
+/*++
+
+Routine Description:
+ Given an integer number, return the physical address of the entry point in the IFT
+
+Arguments:
+ UINTN HandlerIndex,
+ VOID ** EntryPoint
+
+Returns:
+
+ Nothing
+
+--*/
+// TODO: HandlerIndex - add argument and description to function comment
+// TODO: EntryPoint - add argument and description to function comment
+{
+ UINT8 *TempPtr;
+
+ //
+ // get base address of IVT
+ //
+ TempPtr = GetIva ();
+
+ if (HandlerIndex < 20) {
+ //
+ // first 20 provide 64 bundles per vector
+ //
+ TempPtr += 0x400 * HandlerIndex;
+ } else {
+ //
+ // the rest provide 16 bundles per vector
+ //
+ TempPtr += 0x5000 + 0x100 * (HandlerIndex - 20);
+ }
+
+ *EntryPoint = (VOID *) TempPtr;
+}
+
+STATIC
+EFI_STATUS
+ManageIvtEntryTable (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN BUNDLE NewBundles[NUM_BUNDLES_IN_STUB],
+ IN VOID (*NewCallback) ()
+ )
+/*++
+
+Routine Description:
+ This is the worker function that installs and removes all handlers
+
+Arguments:
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN BUNDLE NewBundles[NUM_BUNDLES_IN_STUB],
+ IN VOID (*NewCallback) ()
+
+Returns:
+
+ EFI_STATUS - any return other than EFI_SUCCESS indicates the request was not
+ satisfied.
+
+--*/
+// TODO: ExceptionType - add argument and description to function comment
+// TODO: ] - add argument and description to function comment
+// TODO: ) - add argument and description to function comment
+// TODO: EFI_ALREADY_STARTED - add return value to function comment
+{
+ BUNDLE *B0Ptr;
+ UINT64 InterruptFlags;
+ EFI_TPL OldTpl;
+
+ //
+ // Get address of bundle 0
+ //
+ GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);
+
+ if (IvtEntryTable[ExceptionType].RegisteredCallback != NULL) {
+ //
+ // we've already installed to this vector
+ //
+ if (NewCallback != NULL) {
+ //
+ // if the input handler is non-null, error
+ //
+ return EFI_ALREADY_STARTED;
+ } else {
+ //
+ // else remove the previously installed handler
+ //
+ OldTpl = gBS->RaiseTPL (EFI_TPL_HIGH_LEVEL);
+ InterruptFlags = ProgramInterruptFlags (DISABLE_INTERRUPTS);
+ if (ExceptionType == EXCEPT_IPF_EXTERNAL_INTERRUPT) {
+ UnchainExternalInterrupt ();
+ } else {
+ UnhookEntry (ExceptionType);
+ }
+
+ ProgramInterruptFlags (InterruptFlags);
+ gBS->RestoreTPL (OldTpl);
+ //
+ // re-init IvtEntryTable
+ //
+ gBS->SetMem (&IvtEntryTable[ExceptionType], sizeof (IVT_ENTRY), 0);
+ }
+ } else {
+ //
+ // no user handler installed on this vector
+ //
+ if (NewCallback != NULL) {
+ OldTpl = gBS->RaiseTPL (EFI_TPL_HIGH_LEVEL);
+ InterruptFlags = ProgramInterruptFlags (DISABLE_INTERRUPTS);
+ if (ExceptionType == EXCEPT_IPF_EXTERNAL_INTERRUPT) {
+ ChainExternalInterrupt (NewCallback);
+ } else {
+ HookEntry (ExceptionType, NewBundles, NewCallback);
+ }
+
+ ProgramInterruptFlags (InterruptFlags);
+ gBS->RestoreTPL (OldTpl);
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
+STATIC
+VOID
+HookEntry (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN BUNDLE NewBundles[4],
+ IN VOID (*NewCallback) ()
+ )
+/*++
+
+Routine Description:
+ Saves original IVT contents and inserts a few new bundles which are fixed up
+ to store the ExceptionType and then call the common handler.
+
+Arguments:
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN BUNDLE NewBundles[4],
+ IN VOID (*NewCallback) ()
+
+Returns:
+
+ Nothing
+
+--*/
+// TODO: ExceptionType - add argument and description to function comment
+// TODO: ] - add argument and description to function comment
+// TODO: ) - add argument and description to function comment
+{
+ BUNDLE *FixupBundle;
+ BUNDLE *B0Ptr;
+
+ //
+ // Get address of bundle 0
+ //
+ GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);
+
+ //
+ // copy original bundles from IVT to IvtEntryTable so we can restore them later
+ //
+ gBS->CopyMem (
+ IvtEntryTable[ExceptionType].OrigBundles,
+ B0Ptr,
+ sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB
+ );
+ //
+ // insert new B0
+ //
+ gBS->CopyMem (B0Ptr, NewBundles, sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB);
+
+ //
+ // fixup IVT entry so it stores its index and whether or not to chain...
+ //
+ FixupBundle = B0Ptr + 2;
+ FixupBundle->high |= ExceptionType << 36;
+
+ InstructionCacheFlush (B0Ptr, 5);
+ IvtEntryTable[ExceptionType].RegisteredCallback = NewCallback;
+}
+
+STATIC
+VOID
+UnhookEntry (
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ )
+/*++
+
+Routine Description:
+ Restores original IVT contents when unregistering a callback function
+
+Arguments:
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+
+Returns:
+
+ Nothing
+
+--*/
+// TODO: ExceptionType - add argument and description to function comment
+{
+ BUNDLE *B0Ptr;
+
+ //
+ // Get address of bundle 0
+ //
+ GetHandlerEntryPoint (ExceptionType, (VOID **) &B0Ptr);
+ //
+ // restore original bundles in IVT
+ //
+ gBS->CopyMem (
+ B0Ptr,
+ IvtEntryTable[ExceptionType].OrigBundles,
+ sizeof (BUNDLE) * NUM_BUNDLES_IN_STUB
+ );
+ InstructionCacheFlush (B0Ptr, 5);
+}
+
+STATIC
+VOID
+ChainExternalInterrupt (
+ IN VOID (*NewCallback) ()
+ )
+/*++
+
+Routine Description:
+ Sets up cache flush and calls assembly function to chain external interrupt.
+ Records new callback in IvtEntryTable.
+
+Arguments:
+ IN VOID (*NewCallback) ()
+
+Returns:
+
+ Nothing
+
+--*/
+// TODO: ) - add argument and description to function comment
+{
+ VOID *Start;
+
+ Start = (VOID *) ((UINT8 *) GetIva () + 0x400 * EXCEPT_IPF_EXTERNAL_INTERRUPT + 0x400);
+ IvtEntryTable[EXCEPT_IPF_EXTERNAL_INTERRUPT].RegisteredCallback = NewCallback;
+ ChainHandler ();
+ InstructionCacheFlush (Start, 0x400);
+}
+
+STATIC
+VOID
+UnchainExternalInterrupt (
+ VOID
+ )
+/*++
+
+Routine Description:
+ Sets up cache flush and calls assembly function to restore external interrupt.
+ Removes registered callback from IvtEntryTable.
+
+Arguments:
+ Nothing
+
+Returns:
+
+ Nothing
+
+--*/
+{
+ VOID *Start;
+
+ Start = (VOID *) ((UINT8 *) GetIva () + 0x400 * EXCEPT_IPF_EXTERNAL_INTERRUPT + 0x400);
+ UnchainHandler ();
+ InstructionCacheFlush (Start, 0x400);
+ IvtEntryTable[EXCEPT_IPF_EXTERNAL_INTERRUPT].RegisteredCallback = NULL;
+}
+
+//
+// The rest of the functions in this file are all member functions for the
+// DebugSupport protocol
+//
+
+EFI_STATUS
+EFIAPI
+GetMaximumProcessorIndex (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ OUT UINTN *MaxProcessorIndex
+ )
+/*++
+
+Routine Description: This is a DebugSupport protocol member function. Hard
+ coded to support only 1 processor for now.
+
+Arguments:
+
+Returns: Always returns EFI_SUCCESS with *MaxProcessorIndex set to 0
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: MaxProcessorIndex - add argument and description to function comment
+{
+ *MaxProcessorIndex = 0;
+ return (EFI_SUCCESS);
+}
+
+EFI_STATUS
+EFIAPI
+RegisterPeriodicCallback (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_PERIODIC_CALLBACK NewPeriodicCallback
+ )
+/*++
+
+Routine Description:
+ DebugSupport protocol member function
+
+Arguments:
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_PERIODIC_CALLBACK NewPeriodicCallback
+
+Returns:
+
+ EFI_STATUS - anything other than EFI_SUCCESS indicates the callback was not registered.
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: ProcessorIndex - add argument and description to function comment
+// TODO: NewPeriodicCallback - add argument and description to function comment
+{
+ return ManageIvtEntryTable (EXCEPT_IPF_EXTERNAL_INTERRUPT, NULL, NewPeriodicCallback);
+}
+
+EFI_STATUS
+EFIAPI
+RegisterExceptionCallback (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_EXCEPTION_CALLBACK NewCallback,
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ )
+/*++
+
+Routine Description:
+ DebugSupport protocol member function
+
+Arguments:
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN EFI_EXCEPTION_CALLBACK NewCallback,
+ IN EFI_EXCEPTION_TYPE ExceptionType
+
+Returns:
+
+ EFI_STATUS - anything other than EFI_SUCCESS indicates the callback was not registered.
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: ProcessorIndex - add argument and description to function comment
+// TODO: NewCallback - add argument and description to function comment
+// TODO: ExceptionType - add argument and description to function comment
+{
+ return ManageIvtEntryTable (
+ ExceptionType,
+ (BUNDLE *) ((EFI_PLABEL *) HookStub)->EntryPoint,
+ NewCallback
+ );
+}
+
+EFI_STATUS
+EFIAPI
+InvalidateInstructionCache (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN VOID *Start,
+ IN UINTN Length
+ )
+/*++
+
+Routine Description:
+ DebugSupport protocol member function. Calls assembly routine to flush cache.
+
+Arguments:
+
+Returns:
+ EFI_SUCCESS
+
+--*/
+// TODO: This - add argument and description to function comment
+// TODO: ProcessorIndex - add argument and description to function comment
+// TODO: Start - add argument and description to function comment
+// TODO: Length - add argument and description to function comment
+{
+ InstructionCacheFlush (Start, Length);
+ return (EFI_SUCCESS);
+}
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