diff options
author | Maurice Ma <maurice.ma@intel.com> | 2019-05-10 10:39:08 -0700 |
---|---|---|
committer | Maurice Ma <maurice.ma@intel.com> | 2019-05-10 10:53:45 -0700 |
commit | f684c3f5eef4be691e137ae64e7d00521ec201de (patch) | |
tree | a925288f9225701e6d45ee5303af4482a4ee031f /CorebootModulePkg/Library | |
parent | ae3c247dbc943d707e5007f12f5a5862b4e97781 (diff) | |
download | edk2-f684c3f5eef4be691e137ae64e7d00521ec201de.zip edk2-f684c3f5eef4be691e137ae64e7d00521ec201de.tar.gz edk2-f684c3f5eef4be691e137ae64e7d00521ec201de.tar.bz2 |
Coreboot*Pkg: Retire CorebootPayloadPkg and CorebootModulePkg
RFC: https://edk2.groups.io/g/devel/message/39126
Since UefiPayloadPkg in EDK2 supports Coreboot and Slim Bootloader,
and I don't receive any concerns for the RFC to remove CorebootModulePkg
and CorebootPayloadPkg from EDK2, here is the action patch to remove
CorebootPayloadPkg and CorebootModulePkg.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Cc: Prince Agyeman <prince.agyeman@intel.com>
Cc: Benjamin You <benjamin.you@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Diffstat (limited to 'CorebootModulePkg/Library')
8 files changed, 0 insertions, 1979 deletions
diff --git a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c deleted file mode 100644 index 0717ffc..0000000 --- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.c +++ /dev/null @@ -1,1089 +0,0 @@ -/** @file - 16550 UART Serial Port library functions - - (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR> - Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR> - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include <Base.h> -#include <IndustryStandard/Pci.h> -#include <Library/SerialPortLib.h> -#include <Library/PcdLib.h> -#include <Library/IoLib.h> -#include <Library/PciLib.h> -#include <Library/PlatformHookLib.h> -#include <Library/BaseLib.h> - -// -// PCI Definitions.
-// -#define PCI_BRIDGE_32_BIT_IO_SPACE 0x01 - -// -// 16550 UART register offsets and bitfields -// -#define R_UART_RXBUF 0 -#define R_UART_TXBUF 0 -#define R_UART_BAUD_LOW 0 -#define R_UART_BAUD_HIGH 1 -#define R_UART_FCR 2 -#define B_UART_FCR_FIFOE BIT0 -#define B_UART_FCR_FIFO64 BIT5 -#define R_UART_LCR 3 -#define B_UART_LCR_DLAB BIT7 -#define R_UART_MCR 4 -#define B_UART_MCR_DTRC BIT0 -#define B_UART_MCR_RTS BIT1 -#define R_UART_LSR 5 -#define B_UART_LSR_RXRDY BIT0 -#define B_UART_LSR_TXRDY BIT5 -#define B_UART_LSR_TEMT BIT6 -#define R_UART_MSR 6 -#define B_UART_MSR_CTS BIT4 -#define B_UART_MSR_DSR BIT5 -#define B_UART_MSR_RI BIT6 -#define B_UART_MSR_DCD BIT7 - -// -// 4-byte structure for each PCI node in PcdSerialPciDeviceInfo -// -typedef struct { - UINT8 Device; - UINT8 Function; - UINT16 PowerManagementStatusAndControlRegister; -} PCI_UART_DEVICE_INFO; - -/** - Read an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is read from - MMIO space. If PcdSerialUseMmio is FALSE, then the value is read from I/O space. The - parameter Offset is added to the base address of the 16550 registers that is specified - by PcdSerialRegisterBase. - - @param Base The base address register of UART device. - @param Offset The offset of the 16550 register to read. - - @return The value read from the 16550 register. - -**/ -UINT8 -SerialPortReadRegister ( - UINTN Base, - UINTN Offset - ) -{ - if (PcdGetBool (PcdSerialUseMmio)) { - return MmioRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); - } else { - return IoRead8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride)); - } -} - -/** - Write an 8-bit 16550 register. If PcdSerialUseMmio is TRUE, then the value is written to - MMIO space. If PcdSerialUseMmio is FALSE, then the value is written to I/O space. The - parameter Offset is added to the base address of the 16550 registers that is specified - by PcdSerialRegisterBase. - - @param Base The base address register of UART device. - @param Offset The offset of the 16550 register to write. - @param Value The value to write to the 16550 register specified by Offset. - - @return The value written to the 16550 register. - -**/ -UINT8 -SerialPortWriteRegister ( - UINTN Base, - UINTN Offset, - UINT8 Value - ) -{ - if (PcdGetBool (PcdSerialUseMmio)) { - return MmioWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value); - } else { - return IoWrite8 (Base + Offset * PcdGet32 (PcdSerialRegisterStride), Value); - } -} - -/** - Update the value of an 16-bit PCI configuration register in a PCI device. If the - PCI Configuration register specified by PciAddress is already programmed with a - non-zero value, then return the current value. Otherwise update the PCI configuration - register specified by PciAddress with the value specified by Value and return the - value programmed into the PCI configuration register. All values must be masked - using the bitmask specified by Mask. - - @param PciAddress PCI Library address of the PCI Configuration register to update. - @param Value The value to program into the PCI Configuration Register. - @param Mask Bitmask of the bits to check and update in the PCI configuration register. - -**/ -UINT16 -SerialPortLibUpdatePciRegister16 ( - UINTN PciAddress, - UINT16 Value, - UINT16 Mask - ) -{ - UINT16 CurrentValue; - - CurrentValue = PciRead16 (PciAddress) & Mask; - if (CurrentValue != 0) { - return CurrentValue; - } - return PciWrite16 (PciAddress, Value & Mask); -} - -/** - Update the value of an 32-bit PCI configuration register in a PCI device. If the - PCI Configuration register specified by PciAddress is already programmed with a - non-zero value, then return the current value. Otherwise update the PCI configuration - register specified by PciAddress with the value specified by Value and return the - value programmed into the PCI configuration register. All values must be masked - using the bitmask specified by Mask. - - @param PciAddress PCI Library address of the PCI Configuration register to update. - @param Value The value to program into the PCI Configuration Register. - @param Mask Bitmask of the bits to check and update in the PCI configuration register. - - @return The Secondary bus number that is actually programed into the PCI to PCI Bridge device. - -**/ -UINT32 -SerialPortLibUpdatePciRegister32 ( - UINTN PciAddress, - UINT32 Value, - UINT32 Mask - ) -{ - UINT32 CurrentValue; - - CurrentValue = PciRead32 (PciAddress) & Mask; - if (CurrentValue != 0) { - return CurrentValue; - } - return PciWrite32 (PciAddress, Value & Mask); -} - -/** - Retrieve the I/O or MMIO base address register for the PCI UART device. - - This function assumes Root Bus Numer is Zero, and enables I/O and MMIO in PCI UART - Device if they are not already enabled. - - @return The base address register of the UART device. - -**/ -UINTN -GetSerialRegisterBase ( - VOID - ) -{ - UINTN PciLibAddress; - UINTN BusNumber; - UINTN SubordinateBusNumber; - UINT32 ParentIoBase; - UINT32 ParentIoLimit; - UINT16 ParentMemoryBase; - UINT16 ParentMemoryLimit; - UINT32 IoBase; - UINT32 IoLimit; - UINT16 MemoryBase; - UINT16 MemoryLimit; - UINTN SerialRegisterBase; - UINTN BarIndex; - UINT32 RegisterBaseMask; - PCI_UART_DEVICE_INFO *DeviceInfo; - - // - // Get PCI Device Info - // - DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo); - - // - // If PCI Device Info is empty, then assume fixed address UART and return PcdSerialRegisterBase - // - if (DeviceInfo->Device == 0xff) { - return (UINTN)PcdGet64 (PcdSerialRegisterBase); - } - - // - // Assume PCI Bus 0 I/O window is 0-64KB and MMIO windows is 0-4GB - // - ParentMemoryBase = 0 >> 16; - ParentMemoryLimit = 0xfff00000 >> 16; - ParentIoBase = 0 >> 12; - ParentIoLimit = 0xf000 >> 12; - - // - // Enable I/O and MMIO in PCI Bridge - // Assume Root Bus Numer is Zero. - // - for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) { - // - // Compute PCI Lib Address to PCI to PCI Bridge - // - PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0); - - // - // Retrieve and verify the bus numbers in the PCI to PCI Bridge - // - BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET); - SubordinateBusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET); - if (BusNumber == 0 || BusNumber > SubordinateBusNumber) { - return 0; - } - - // - // Retrieve and verify the I/O or MMIO decode window in the PCI to PCI Bridge - // - if (PcdGetBool (PcdSerialUseMmio)) { - MemoryLimit = PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.MemoryLimit)) & 0xfff0; - MemoryBase = PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.MemoryBase)) & 0xfff0; - - // - // If PCI Bridge MMIO window is disabled, then return 0 - // - if (MemoryLimit < MemoryBase) { - return 0; - } - - // - // If PCI Bridge MMIO window is not in the address range decoded by the parent PCI Bridge, then return 0 - // - if (MemoryBase < ParentMemoryBase || MemoryBase > ParentMemoryLimit || MemoryLimit > ParentMemoryLimit) { - return 0; - } - ParentMemoryBase = MemoryBase; - ParentMemoryLimit = MemoryLimit; - } else { - IoLimit = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimit)); - if ((IoLimit & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) { - IoLimit = IoLimit >> 4; - } else { - IoLimit = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoLimitUpper16)) << 4) | (IoLimit >> 4); - } - IoBase = PciRead8 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBase)); - if ((IoBase & PCI_BRIDGE_32_BIT_IO_SPACE ) == 0) { - IoBase = IoBase >> 4; - } else { - IoBase = (PciRead16 (PciLibAddress + OFFSET_OF (PCI_TYPE01, Bridge.IoBaseUpper16)) << 4) | (IoBase >> 4); - } - - // - // If PCI Bridge I/O window is disabled, then return 0 - // - if (IoLimit < IoBase) { - return 0; - } - - // - // If PCI Bridge I/O window is not in the address range decoded by the parent PCI Bridge, then return 0 - // - if (IoBase < ParentIoBase || IoBase > ParentIoLimit || IoLimit > ParentIoLimit) { - return 0; - } - ParentIoBase = IoBase; - ParentIoLimit = IoLimit; - } - } - - // - // Compute PCI Lib Address to PCI UART - // - PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0); - - // - // Find the first IO or MMIO BAR - // - RegisterBaseMask = 0xFFFFFFF0; - for (BarIndex = 0; BarIndex < PCI_MAX_BAR; BarIndex ++) { - SerialRegisterBase = PciRead32 (PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4); - if (PcdGetBool (PcdSerialUseMmio) && ((SerialRegisterBase & BIT0) == 0)) { - // - // MMIO BAR is found - // - RegisterBaseMask = 0xFFFFFFF0; - break; - } - - if ((!PcdGetBool (PcdSerialUseMmio)) && ((SerialRegisterBase & BIT0) != 0)) { - // - // IO BAR is found - // - RegisterBaseMask = 0xFFFFFFF8; - break; - } - } - - // - // MMIO or IO BAR is not found. - // - if (BarIndex == PCI_MAX_BAR) { - return 0; - } - - // - // Program UART BAR - // - SerialRegisterBase = SerialPortLibUpdatePciRegister32 ( - PciLibAddress + PCI_BASE_ADDRESSREG_OFFSET + BarIndex * 4, - (UINT32)PcdGet64 (PcdSerialRegisterBase), - RegisterBaseMask - ); - - // - // Verify that the UART BAR is in the address range decoded by the parent PCI Bridge - // - if (PcdGetBool (PcdSerialUseMmio)) { - if (((SerialRegisterBase >> 16) & 0xfff0) < ParentMemoryBase || ((SerialRegisterBase >> 16) & 0xfff0) > ParentMemoryLimit) { - return 0; - } - } else { - if ((SerialRegisterBase >> 12) < ParentIoBase || (SerialRegisterBase >> 12) > ParentIoLimit) { - return 0; - } - } - - // - // Enable I/O and MMIO in PCI UART Device if they are not already enabled - // - PciOr16 ( - PciLibAddress + PCI_COMMAND_OFFSET, - PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE - ); - - // - // Force D0 state if a Power Management and Status Register is specified - // - if (DeviceInfo->PowerManagementStatusAndControlRegister != 0x00) { - if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) { - PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1)); - // - // If PCI UART was not in D0, then make sure FIFOs are enabled, but do not reset FIFOs - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64))); - } - } - - // - // Get PCI Device Info - // - DeviceInfo = (PCI_UART_DEVICE_INFO *) PcdGetPtr (PcdSerialPciDeviceInfo); - - // - // Enable I/O or MMIO in PCI Bridge - // Assume Root Bus Numer is Zero. - // - for (BusNumber = 0; (DeviceInfo + 1)->Device != 0xff; DeviceInfo++) { - // - // Compute PCI Lib Address to PCI to PCI Bridge - // - PciLibAddress = PCI_LIB_ADDRESS (BusNumber, DeviceInfo->Device, DeviceInfo->Function, 0); - - // - // Enable the I/O or MMIO decode windows in the PCI to PCI Bridge - // - PciOr16 ( - PciLibAddress + PCI_COMMAND_OFFSET, - PcdGetBool (PcdSerialUseMmio) ? EFI_PCI_COMMAND_MEMORY_SPACE : EFI_PCI_COMMAND_IO_SPACE - ); - - // - // Force D0 state if a Power Management and Status Register is specified - // - if (DeviceInfo->PowerManagementStatusAndControlRegister != 0x00) { - if ((PciRead16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister) & (BIT0 | BIT1)) != 0x00) { - PciAnd16 (PciLibAddress + DeviceInfo->PowerManagementStatusAndControlRegister, (UINT16)~(BIT0 | BIT1)); - } - } - - BusNumber = PciRead8 (PciLibAddress + PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET); - } - - return SerialRegisterBase; -} - -/** - Return whether the hardware flow control signal allows writing. - - @param SerialRegisterBase The base address register of UART device. - - @retval TRUE The serial port is writable. - @retval FALSE The serial port is not writable. -**/ -BOOLEAN -SerialPortWritable ( - UINTN SerialRegisterBase - ) -{ - if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { - if (PcdGetBool (PcdSerialDetectCable)) { - // - // Wait for both DSR and CTS to be set - // DSR is set if a cable is connected. - // CTS is set if it is ok to transmit data - // - // DSR CTS Description Action - // === === ======================================== ======== - // 0 0 No cable connected. Wait - // 0 1 No cable connected. Wait - // 1 0 Cable connected, but not clear to send. Wait - // 1 1 Cable connected, and clear to send. Transmit - // - return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) == (B_UART_MSR_DSR | B_UART_MSR_CTS)); - } else { - // - // Wait for both DSR and CTS to be set OR for DSR to be clear. - // DSR is set if a cable is connected. - // CTS is set if it is ok to transmit data - // - // DSR CTS Description Action - // === === ======================================== ======== - // 0 0 No cable connected. Transmit - // 0 1 No cable connected. Transmit - // 1 0 Cable connected, but not clear to send. Wait - // 1 1 Cable connected, and clear to send. Transmit
- // - return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR)); - } - } - - return TRUE; -} - -/** - Initialize the serial device hardware. - - If no initialization is required, then return RETURN_SUCCESS. - If the serial device was successfully initialized, then return RETURN_SUCCESS. - If the serial device could not be initialized, then return RETURN_DEVICE_ERROR. - - @retval RETURN_SUCCESS The serial device was initialized. - @retval RETURN_DEVICE_ERROR The serial device could not be initialized. - -**/ -RETURN_STATUS -EFIAPI -SerialPortInitialize ( - VOID - ) -{ - RETURN_STATUS Status; - UINTN SerialRegisterBase; - UINT32 Divisor; - UINT32 CurrentDivisor; - BOOLEAN Initialized; - - // - // Perform platform specific initialization required to enable use of the 16550 device - // at the location specified by PcdSerialUseMmio and PcdSerialRegisterBase. - // - Status = PlatformHookSerialPortInitialize (); - if (RETURN_ERROR (Status)) { - return Status; - } - - // - // Calculate divisor for baud generator - // Ref_Clk_Rate / Baud_Rate / 16 - // - Divisor = PcdGet32 (PcdSerialClockRate) / (PcdGet32 (PcdSerialBaudRate) * 16); - if ((PcdGet32 (PcdSerialClockRate) % (PcdGet32 (PcdSerialBaudRate) * 16)) >= PcdGet32 (PcdSerialBaudRate) * 8) { - Divisor++; - } - - // - // Get the base address of the serial port in either I/O or MMIO space - // - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return RETURN_DEVICE_ERROR; - } - - // - // See if the serial port is already initialized - // - Initialized = TRUE; - if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) & 0x3F) != (PcdGet8 (PcdSerialLineControl) & 0x3F)) { - Initialized = FALSE; - } - SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) | B_UART_LCR_DLAB)); - CurrentDivisor = SerialPortReadRegister (SerialRegisterBase, R_UART_BAUD_HIGH) << 8; - CurrentDivisor |= (UINT32) SerialPortReadRegister (SerialRegisterBase, R_UART_BAUD_LOW); - SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_LCR) & ~B_UART_LCR_DLAB)); - if (CurrentDivisor != Divisor) { - Initialized = FALSE; - } - if (Initialized) { - return RETURN_SUCCESS; - } - - // - // Wait for the serial port to be ready. - // Verify that both the transmit FIFO and the shift register are empty. - // - while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)); - - // - // Configure baud rate - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DLAB); - SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8)); - SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff)); - - // - // Clear DLAB and configure Data Bits, Parity, and Stop Bits. - // Strip reserved bits from PcdSerialLineControl - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(PcdGet8 (PcdSerialLineControl) & 0x3F)); - - // - // Enable and reset FIFOs - // Strip reserved bits from PcdSerialFifoControl - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, 0x00); - SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGet8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64))); - - // - // Set RTS and DTR in Modem Control Register(MCR) - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, - EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_READY); - - return RETURN_SUCCESS; -} - -/** - Write data from buffer to serial device. - - Writes NumberOfBytes data bytes from Buffer to the serial device. - The number of bytes actually written to the serial device is returned. - If the return value is less than NumberOfBytes, then the write operation failed. - - If Buffer is NULL, then ASSERT(). - - If NumberOfBytes is zero, then return 0. - - @param Buffer Pointer to the data buffer to be written. - @param NumberOfBytes Number of bytes to written to the serial device. - - @retval 0 NumberOfBytes is 0. - @retval >0 The number of bytes written to the serial device. - If this value is less than NumberOfBytes, then the write operation failed. - -**/ -UINTN -EFIAPI -SerialPortWrite ( - IN UINT8 *Buffer, - IN UINTN NumberOfBytes - ) -{ - UINTN SerialRegisterBase; - UINTN Result; - UINTN Index; - UINTN FifoSize; - - if (Buffer == NULL) { - return 0; - } - - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return 0; - } - - if (NumberOfBytes == 0) { - // - // Flush the hardware - // - - // - // Wait for both the transmit FIFO and shift register empty. - // - while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) != (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)); - - // - // Wait for the hardware flow control signal - // - while (!SerialPortWritable (SerialRegisterBase)); - return 0; - } - - // - // Compute the maximum size of the Tx FIFO - // - FifoSize = 1; - if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) != 0) { - if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) == 0) { - FifoSize = 16; - } else { - FifoSize = PcdGet32 (PcdSerialExtendedTxFifoSize); - } - } - - Result = NumberOfBytes; - while (NumberOfBytes != 0) { - // - // Wait for the serial port to be ready, to make sure both the transmit FIFO - // and shift register empty. - // - while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_TEMT) == 0); - - // - // Fill then entire Tx FIFO - // - for (Index = 0; Index < FifoSize && NumberOfBytes != 0; Index++, NumberOfBytes--, Buffer++) { - // - // Wait for the hardware flow control signal - // - while (!SerialPortWritable (SerialRegisterBase)); - - // - // Write byte to the transmit buffer. - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_TXBUF, *Buffer); - } - } - return Result; -} - -/** - Reads data from a serial device into a buffer. - - @param Buffer Pointer to the data buffer to store the data read from the serial device. - @param NumberOfBytes Number of bytes to read from the serial device. - - @retval 0 NumberOfBytes is 0. - @retval >0 The number of bytes read from the serial device. - If this value is less than NumberOfBytes, then the read operation failed. - -**/ -UINTN -EFIAPI -SerialPortRead ( - OUT UINT8 *Buffer, - IN UINTN NumberOfBytes - ) -{ - UINTN SerialRegisterBase; - UINTN Result; - UINT8 Mcr; - - if (NULL == Buffer) { - return 0; - } - - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return 0; - } - - Mcr = (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS); - - for (Result = 0; NumberOfBytes-- != 0; Result++, Buffer++) { - // - // Wait for the serial port to have some data. - // - while ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_RXRDY) == 0) { - if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { - // - // Set RTS to let the peer send some data - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(Mcr | B_UART_MCR_RTS)); - } - } - if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { - // - // Clear RTS to prevent peer from sending data - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr); - } - - // - // Read byte from the receive buffer. - // - *Buffer = SerialPortReadRegister (SerialRegisterBase, R_UART_RXBUF); - } - - return Result; -} - - -/** - Polls a serial device to see if there is any data waiting to be read. - - Polls a serial device to see if there is any data waiting to be read.
- If there is data waiting to be read from the serial device, then TRUE is returned. - If there is no data waiting to be read from the serial device, then FALSE is returned. - - @retval TRUE Data is waiting to be read from the serial device. - @retval FALSE There is no data waiting to be read from the serial device. - -**/ -BOOLEAN -EFIAPI -SerialPortPoll ( - VOID - ) -{ - UINTN SerialRegisterBase; - - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return FALSE; - } - - // - // Read the serial port status - // - if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LSR) & B_UART_LSR_RXRDY) != 0) { - if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { - // - // Clear RTS to prevent peer from sending data - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) & ~B_UART_MCR_RTS)); - } - return TRUE; - } - - if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { - // - // Set RTS to let the peer send some data - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_MCR) | B_UART_MCR_RTS)); - } - - return FALSE; -} - -/** - Sets the control bits on a serial device. - - @param Control Sets the bits of Control that are settable. - - @retval RETURN_SUCCESS The new control bits were set on the serial device. - @retval RETURN_UNSUPPORTED The serial device does not support this operation. - @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly. - -**/ -RETURN_STATUS -EFIAPI -SerialPortSetControl ( - IN UINT32 Control - ) -{ - UINTN SerialRegisterBase; - UINT8 Mcr; - - // - // First determine the parameter is invalid. - // - if ((Control & (~(EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINAL_READY | - EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) != 0) { - return RETURN_UNSUPPORTED; - } - - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return RETURN_UNSUPPORTED; - } - - // - // Read the Modem Control Register. - // - Mcr = SerialPortReadRegister (SerialRegisterBase, R_UART_MCR); - Mcr &= (~(B_UART_MCR_DTRC | B_UART_MCR_RTS)); - - if ((Control & EFI_SERIAL_DATA_TERMINAL_READY) == EFI_SERIAL_DATA_TERMINAL_READY) { - Mcr |= B_UART_MCR_DTRC; - } - - if ((Control & EFI_SERIAL_REQUEST_TO_SEND) == EFI_SERIAL_REQUEST_TO_SEND) { - Mcr |= B_UART_MCR_RTS; - } - - // - // Write the Modem Control Register. - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, Mcr); - - return RETURN_SUCCESS; -} - -/** - Retrieve the status of the control bits on a serial device. - - @param Control A pointer to return the current control signals from the serial device. - - @retval RETURN_SUCCESS The control bits were read from the serial device. - @retval RETURN_UNSUPPORTED The serial device does not support this operation. - @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly. - -**/ -RETURN_STATUS -EFIAPI -SerialPortGetControl ( - OUT UINT32 *Control - ) -{ - UINTN SerialRegisterBase; - UINT8 Msr; - UINT8 Mcr; - UINT8 Lsr; - - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return RETURN_UNSUPPORTED; - } - - *Control = 0; - - // - // Read the Modem Status Register. - // - Msr = SerialPortReadRegister (SerialRegisterBase, R_UART_MSR); - - if ((Msr & B_UART_MSR_CTS) == B_UART_MSR_CTS) { - *Control |= EFI_SERIAL_CLEAR_TO_SEND; - } - - if ((Msr & B_UART_MSR_DSR) == B_UART_MSR_DSR) { - *Control |= EFI_SERIAL_DATA_SET_READY; - } - - if ((Msr & B_UART_MSR_RI) == B_UART_MSR_RI) { - *Control |= EFI_SERIAL_RING_INDICATE; - } - - if ((Msr & B_UART_MSR_DCD) == B_UART_MSR_DCD) { - *Control |= EFI_SERIAL_CARRIER_DETECT; - } - - // - // Read the Modem Control Register. - // - Mcr = SerialPortReadRegister (SerialRegisterBase, R_UART_MCR); - - if ((Mcr & B_UART_MCR_DTRC) == B_UART_MCR_DTRC) { - *Control |= EFI_SERIAL_DATA_TERMINAL_READY; - } - - if ((Mcr & B_UART_MCR_RTS) == B_UART_MCR_RTS) { - *Control |= EFI_SERIAL_REQUEST_TO_SEND; - } - - if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { - *Control |= EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE; - } - - // - // Read the Line Status Register. - // - Lsr = SerialPortReadRegister (SerialRegisterBase, R_UART_LSR); - - if ((Lsr & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) == (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) { - *Control |= EFI_SERIAL_OUTPUT_BUFFER_EMPTY; - } - - if ((Lsr & B_UART_LSR_RXRDY) == 0) { - *Control |= EFI_SERIAL_INPUT_BUFFER_EMPTY; - } - - return RETURN_SUCCESS; -} - -/** - Sets the baud rate, receive FIFO depth, transmit/receive time out, parity,
- data bits, and stop bits on a serial device. - - @param BaudRate The requested baud rate. A BaudRate value of 0 will use the - device's default interface speed. - On output, the value actually set. - @param ReceiveFifoDepth The requested depth of the FIFO on the receive side of the
- serial interface. A ReceiveFifoDepth value of 0 will use - the device's default FIFO depth. - On output, the value actually set. - @param Timeout The requested time out for a single character in microseconds. - This timeout applies to both the transmit and receive side of the - interface. A Timeout value of 0 will use the device's default time - out value. - On output, the value actually set. - @param Parity The type of parity to use on this serial device. A Parity value of - DefaultParity will use the device's default parity value. - On output, the value actually set. - @param DataBits The number of data bits to use on the serial device. A DataBits - value of 0 will use the device's default data bit setting.
- On output, the value actually set. - @param StopBits The number of stop bits to use on this serial device. A StopBits - value of DefaultStopBits will use the device's default number of - stop bits. - On output, the value actually set. - - @retval RETURN_SUCCESS The new attributes were set on the serial device. - @retval RETURN_UNSUPPORTED The serial device does not support this operation. - @retval RETURN_INVALID_PARAMETER One or more of the attributes has an unsupported value. - @retval RETURN_DEVICE_ERROR The serial device is not functioning correctly. - -**/ -RETURN_STATUS -EFIAPI -SerialPortSetAttributes ( - IN OUT UINT64 *BaudRate, - IN OUT UINT32 *ReceiveFifoDepth, - IN OUT UINT32 *Timeout, - IN OUT EFI_PARITY_TYPE *Parity, - IN OUT UINT8 *DataBits, - IN OUT EFI_STOP_BITS_TYPE *StopBits - ) -{ - UINTN SerialRegisterBase; - UINT32 SerialBaudRate; - UINTN Divisor; - UINT8 Lcr; - UINT8 LcrData; - UINT8 LcrParity; - UINT8 LcrStop; - - SerialRegisterBase = GetSerialRegisterBase (); - if (SerialRegisterBase ==0) { - return RETURN_UNSUPPORTED; - } - - // - // Check for default settings and fill in actual values. - // - if (*BaudRate == 0) { - *BaudRate = PcdGet32 (PcdSerialBaudRate); - } - SerialBaudRate = (UINT32) *BaudRate; - - if (*DataBits == 0) { - LcrData = (UINT8) (PcdGet8 (PcdSerialLineControl) & 0x3); - *DataBits = LcrData + 5; - } else { - if ((*DataBits < 5) || (*DataBits > 8)) { - return RETURN_INVALID_PARAMETER; - } - // - // Map 5..8 to 0..3 - // - LcrData = (UINT8) (*DataBits - (UINT8) 5); - } - - if (*Parity == DefaultParity) { - LcrParity = (UINT8) ((PcdGet8 (PcdSerialLineControl) >> 3) & 0x7); - switch (LcrParity) { - case 0: - *Parity = NoParity; - break; - - case 3: - *Parity = EvenParity; - break; - - case 1: - *Parity = OddParity; - break; - - case 7: - *Parity = SpaceParity; - break; - - case 5: - *Parity = MarkParity; - break; - - default: - break; - } - } else { - switch (*Parity) { - case NoParity: - LcrParity = 0; - break; - - case EvenParity: - LcrParity = 3; - break; - - case OddParity: - LcrParity = 1; - break; - - case SpaceParity: - LcrParity = 7; - break; - - case MarkParity: - LcrParity = 5; - break; - - default: - return RETURN_INVALID_PARAMETER; - } - } - - if (*StopBits == DefaultStopBits) { - LcrStop = (UINT8) ((PcdGet8 (PcdSerialLineControl) >> 2) & 0x1); - switch (LcrStop) { - case 0: - *StopBits = OneStopBit; - break; - - case 1: - if (*DataBits == 5) { - *StopBits = OneFiveStopBits; - } else { - *StopBits = TwoStopBits; - } - break; - - default: - break; - } - } else { - switch (*StopBits) { - case OneStopBit: - LcrStop = 0; - break; - - case OneFiveStopBits: - case TwoStopBits: - LcrStop = 1; - break; - - default: - return RETURN_INVALID_PARAMETER; - } - } - - // - // Calculate divisor for baud generator - // Ref_Clk_Rate / Baud_Rate / 16 - // - Divisor = PcdGet32 (PcdSerialClockRate) / (SerialBaudRate * 16); - if ((PcdGet32 (PcdSerialClockRate) % (SerialBaudRate * 16)) >= SerialBaudRate * 8) { - Divisor++; - } - - // - // Configure baud rate - // - SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DLAB); - SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8) (Divisor >> 8)); - SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8) (Divisor & 0xff)); - - // - // Clear DLAB and configure Data Bits, Parity, and Stop Bits. - // Strip reserved bits from line control value - // - Lcr = (UINT8) ((LcrParity << 3) | (LcrStop << 2) | LcrData); - SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8) (Lcr & 0x3F)); - - return RETURN_SUCCESS; -} - diff --git a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf deleted file mode 100644 index 5dd9518..0000000 --- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf +++ /dev/null @@ -1,42 +0,0 @@ -## @file -# SerialPortLib instance for 16550 UART. -# -# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = BaseSerialPortLib16550 - MODULE_UNI_FILE = BaseSerialPortLib16550.uni - FILE_GUID = 9E7C00CF-355A-4d4e-BF60-0428CFF95540 - MODULE_TYPE = BASE - VERSION_STRING = 1.1 - LIBRARY_CLASS = SerialPortLib - -[Packages] - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - -[LibraryClasses] - PcdLib - IoLib - PlatformHookLib - PciLib - -[Sources] - BaseSerialPortLib16550.c - -[Pcd] - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialDetectCable ## SOMETIMES_CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialPciDeviceInfo ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize ## CONSUMES - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterStride ## CONSUMES diff --git a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.uni b/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.uni deleted file mode 100644 index e8b178d..0000000 --- a/CorebootModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.uni +++ /dev/null @@ -1,16 +0,0 @@ -// /** @file -// SerialPortLib instance for 16550 UART. -// -// SerialPortLib instance for 16550 UART. -// -// Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR> -// -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - - -#string STR_MODULE_ABSTRACT #language en-US "SerialPortLib instance for 16550 UART" - -#string STR_MODULE_DESCRIPTION #language en-US "SerialPortLib instance for 16550 UART." - diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c b/CorebootModulePkg/Library/CbParseLib/CbParseLib.c deleted file mode 100644 index 38f31bd..0000000 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.c +++ /dev/null @@ -1,721 +0,0 @@ -/** @file
- This library will parse the coreboot table in memory and extract those required
- information.
-
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
-**/
-
-#include <Uefi/UefiBaseType.h>
-#include <Library/BaseLib.h>
-#include <Library/BaseMemoryLib.h>
-#include <Library/DebugLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/CbParseLib.h>
-
-#include <IndustryStandard/Acpi.h>
-
-#include "Coreboot.h"
-
-
-/**
- Convert a packed value from cbuint64 to a UINT64 value.
-
- @param val The pointer to packed data.
-
- @return the UNIT64 value after conversion.
-
-**/
-UINT64
-cb_unpack64 (
- IN struct cbuint64 val
- )
-{
- return LShiftU64 (val.hi, 32) | val.lo;
-}
-
-
-/**
- Returns the sum of all elements in a buffer of 16-bit values. During
- calculation, the carry bits are also been added.
-
- @param Buffer The pointer to the buffer to carry out the sum operation.
- @param Length The size, in bytes, of Buffer.
-
- @return Sum The sum of Buffer with carry bits included during additions.
-
-**/
-UINT16
-CbCheckSum16 (
- IN UINT16 *Buffer,
- IN UINTN Length
- )
-{
- UINT32 Sum, TmpValue;
- UINTN Idx;
- UINT8 *TmpPtr;
-
- Sum = 0;
- TmpPtr = (UINT8 *)Buffer;
- for(Idx = 0; Idx < Length; Idx++) {
- TmpValue = TmpPtr[Idx];
- if (Idx % 2 == 1) {
- TmpValue <<= 8;
- }
-
- Sum += TmpValue;
-
- // Wrap
- if (Sum >= 0x10000) {
- Sum = (Sum + (Sum >> 16)) & 0xFFFF;
- }
- }
-
- return (UINT16)((~Sum) & 0xFFFF);
-}
-
-
-/**
- Find coreboot record with given Tag from the memory Start in 4096
- bytes range.
-
- @param Start The start memory to be searched in
- @param Tag The tag id to be found
-
- @retval NULL The Tag is not found.
- @retval Others The pointer to the record found.
-
-**/
-VOID *
-EFIAPI
-FindCbTag (
- IN VOID *Start,
- IN UINT32 Tag
- )
-{
- struct cb_header *Header;
- struct cb_record *Record;
- UINT8 *TmpPtr;
- UINT8 *TagPtr;
- UINTN Idx;
- UINT16 CheckSum;
-
- Header = NULL;
- TmpPtr = (UINT8 *)Start;
- for (Idx = 0; Idx < 4096; Idx += 16, TmpPtr += 16) {
- Header = (struct cb_header *)TmpPtr;
- if (Header->signature == CB_HEADER_SIGNATURE) {
- break;
- }
- }
-
- if (Idx >= 4096) {
- return NULL;
- }
-
- if ((Header == NULL) || (Header->table_bytes == 0)) {
- return NULL;
- }
-
- //
- // Check the checksum of the coreboot table header
- //
- CheckSum = CbCheckSum16 ((UINT16 *)Header, sizeof (*Header));
- if (CheckSum != 0) {
- DEBUG ((EFI_D_ERROR, "Invalid coreboot table header checksum\n"));
- return NULL;
- }
-
- CheckSum = CbCheckSum16 ((UINT16 *)(TmpPtr + sizeof (*Header)), Header->table_bytes);
- if (CheckSum != Header->table_checksum) {
- DEBUG ((EFI_D_ERROR, "Incorrect checksum of all the coreboot table entries\n"));
- return NULL;
- }
-
- TagPtr = NULL;
- TmpPtr += Header->header_bytes;
- for (Idx = 0; Idx < Header->table_entries; Idx++) {
- Record = (struct cb_record *)TmpPtr;
- if (Record->tag == CB_TAG_FORWARD) {
- TmpPtr = (VOID *)(UINTN)((struct cb_forward *)(UINTN)Record)->forward;
- if (Tag == CB_TAG_FORWARD) {
- return TmpPtr;
- } else {
- return FindCbTag (TmpPtr, Tag);
- }
- }
- if (Record->tag == Tag) {
- TagPtr = TmpPtr;
- break;
- }
- TmpPtr += Record->size;
- }
-
- return TagPtr;
-}
-
-
-/**
- Find the given table with TableId from the given coreboot memory Root.
-
- @param Root The coreboot memory table to be searched in
- @param TableId Table id to be found
- @param pMemTable To save the base address of the memory table found
- @param pMemTableSize To save the size of memory table found
-
- @retval RETURN_SUCCESS Successfully find out the memory table.
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.
- @retval RETURN_NOT_FOUND Failed to find the memory table.
-
-**/
-RETURN_STATUS
-EFIAPI
-FindCbMemTable (
- IN struct cbmem_root *Root,
- IN UINT32 TableId,
- OUT VOID **pMemTable,
- OUT UINT32 *pMemTableSize
- )
-{
- UINTN Idx;
- BOOLEAN IsImdEntry;
- struct cbmem_entry *Entries;
-
- if ((Root == NULL) || (pMemTable == NULL)) {
- return RETURN_INVALID_PARAMETER;
- }
- //
- // Check if the entry is CBMEM or IMD
- // and handle them separately
- //
- Entries = Root->entries;
- if (Entries[0].magic == CBMEM_ENTRY_MAGIC) {
- IsImdEntry = FALSE;
- } else {
- Entries = (struct cbmem_entry *)((struct imd_root *)Root)->entries;
- if (Entries[0].magic == IMD_ENTRY_MAGIC) {
- IsImdEntry = TRUE;
- } else {
- return RETURN_NOT_FOUND;
- }
- }
-
- for (Idx = 0; Idx < Root->num_entries; Idx++) {
- if (Entries[Idx].id == TableId) {
- if (IsImdEntry) {
- *pMemTable = (VOID *) ((UINTN)Entries[Idx].start + (UINTN)Root);
- } else {
- *pMemTable = (VOID *) (UINTN)Entries[Idx].start;
- }
- if (pMemTableSize != NULL) {
- *pMemTableSize = Entries[Idx].size;
- }
-
- DEBUG ((EFI_D_INFO, "Find CbMemTable Id 0x%x, base %p, size 0x%x\n",
- TableId, *pMemTable, Entries[Idx].size));
- return RETURN_SUCCESS;
- }
- }
-
- return RETURN_NOT_FOUND;
-}
-
-
-/**
- Acquire the memory information from the coreboot table in memory.
-
- @param MemInfoCallback The callback routine
- @param pParam Pointer to the callback routine parameter
-
- @retval RETURN_SUCCESS Successfully find out the memory information.
- @retval RETURN_NOT_FOUND Failed to find the memory information.
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseMemoryInfo (
- IN CB_MEM_INFO_CALLBACK MemInfoCallback,
- IN VOID *pParam
- )
-{
- struct cb_memory *rec;
- struct cb_memory_range *Range;
- UINT64 Start;
- UINT64 Size;
- UINTN Index;
-
- //
- // Get the coreboot memory table
- //
- rec = (struct cb_memory *)FindCbTag (0, CB_TAG_MEMORY);
- if (rec == NULL) {
- rec = (struct cb_memory *)FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_MEMORY);
- }
-
- if (rec == NULL) {
- return RETURN_NOT_FOUND;
- }
-
- for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {
- Range = MEM_RANGE_PTR(rec, Index);
- Start = cb_unpack64(Range->start);
- Size = cb_unpack64(Range->size);
- DEBUG ((EFI_D_INFO, "%d. %016lx - %016lx [%02x]\n",
- Index, Start, Start + Size - 1, Range->type));
-
- MemInfoCallback (Start, Size, Range->type, pParam);
- }
-
- return RETURN_SUCCESS;
-}
-
-
-/**
- Acquire the coreboot memory table with the given table id
-
- @param TableId Table id to be searched
- @param pMemTable Pointer to the base address of the memory table
- @param pMemTableSize Pointer to the size of the memory table
-
- @retval RETURN_SUCCESS Successfully find out the memory table.
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.
- @retval RETURN_NOT_FOUND Failed to find the memory table.
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseCbMemTable (
- IN UINT32 TableId,
- OUT VOID **pMemTable,
- OUT UINT32 *pMemTableSize
- )
-{
- struct cb_memory *rec;
- struct cb_memory_range *Range;
- UINT64 Start;
- UINT64 Size;
- UINTN Index;
-
- if (pMemTable == NULL) {
- return RETURN_INVALID_PARAMETER;
- }
- *pMemTable = NULL;
-
- //
- // Get the coreboot memory table
- //
- rec = (struct cb_memory *)FindCbTag (0, CB_TAG_MEMORY);
- if (rec == NULL) {
- rec = (struct cb_memory *)FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_MEMORY);
- }
-
- if (rec == NULL) {
- return RETURN_NOT_FOUND;
- }
-
- for (Index = 0; Index < MEM_RANGE_COUNT(rec); Index++) {
- Range = MEM_RANGE_PTR(rec, Index);
- Start = cb_unpack64(Range->start);
- Size = cb_unpack64(Range->size);
-
- if ((Range->type == CB_MEM_TABLE) && (Start > 0x1000)) {
- if (FindCbMemTable ((struct cbmem_root *)(UINTN)(Start + Size - DYN_CBMEM_ALIGN_SIZE), TableId, pMemTable, pMemTableSize) == RETURN_SUCCESS)
- return RETURN_SUCCESS;
- }
- }
-
- return RETURN_NOT_FOUND;
-}
-
-
-/**
- Acquire the acpi table from coreboot
-
- @param pMemTable Pointer to the base address of the memory table
- @param pMemTableSize Pointer to the size of the memory table
-
- @retval RETURN_SUCCESS Successfully find out the memory table.
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.
- @retval RETURN_NOT_FOUND Failed to find the memory table.
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseAcpiTable (
- OUT VOID **pMemTable,
- OUT UINT32 *pMemTableSize
- )
-{
- return CbParseCbMemTable (SIGNATURE_32 ('I', 'P', 'C', 'A'), pMemTable, pMemTableSize);
-}
-
-/**
- Acquire the smbios table from coreboot
-
- @param pMemTable Pointer to the base address of the memory table
- @param pMemTableSize Pointer to the size of the memory table
-
- @retval RETURN_SUCCESS Successfully find out the memory table.
- @retval RETURN_INVALID_PARAMETER Invalid input parameters.
- @retval RETURN_NOT_FOUND Failed to find the memory table.
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseSmbiosTable (
- OUT VOID **pMemTable,
- OUT UINT32 *pMemTableSize
- )
-{
- return CbParseCbMemTable (SIGNATURE_32 ('T', 'B', 'M', 'S'), pMemTable, pMemTableSize);
-}
-
-/**
- Find the required fadt information
-
- @param pPmCtrlReg Pointer to the address of power management control register
- @param pPmTimerReg Pointer to the address of power management timer register
- @param pResetReg Pointer to the address of system reset register
- @param pResetValue Pointer to the value to be written to the system reset register
- @param pPmEvtReg Pointer to the address of power management event register
- @param pPmGpeEnReg Pointer to the address of power management GPE enable register
-
- @retval RETURN_SUCCESS Successfully find out all the required fadt information.
- @retval RETURN_NOT_FOUND Failed to find the fadt table.
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseFadtInfo (
- OUT UINTN *pPmCtrlReg,
- OUT UINTN *pPmTimerReg,
- OUT UINTN *pResetReg,
- OUT UINTN *pResetValue,
- OUT UINTN *pPmEvtReg,
- OUT UINTN *pPmGpeEnReg
- )
-{
- EFI_ACPI_3_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
- EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
- UINT32 *Entry32;
- UINTN Entry32Num;
- EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *Fadt;
- EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
- UINT64 *Entry64;
- UINTN Entry64Num;
- UINTN Idx;
- RETURN_STATUS Status;
-
- Rsdp = NULL;
- Status = RETURN_SUCCESS;
-
- Status = CbParseAcpiTable ((VOID **)&Rsdp, NULL);
- if (RETURN_ERROR(Status)) {
- return Status;
- }
-
- if (Rsdp == NULL) {
- return RETURN_NOT_FOUND;
- }
-
- DEBUG ((EFI_D_INFO, "Find Rsdp at %p\n", Rsdp));
- DEBUG ((EFI_D_INFO, "Find Rsdt 0x%x, Xsdt 0x%lx\n", Rsdp->RsdtAddress, Rsdp->XsdtAddress));
-
- //
- // Search Rsdt First
- //
- Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->RsdtAddress);
- if (Rsdt != NULL) {
- Entry32 = (UINT32 *)(Rsdt + 1);
- Entry32Num = (Rsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 2;
- for (Idx = 0; Idx < Entry32Num; Idx++) {
- if (*(UINT32 *)(UINTN)(Entry32[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
- Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry32[Idx]);
- if (pPmCtrlReg != NULL) {
- *pPmCtrlReg = Fadt->Pm1aCntBlk;
- }
- DEBUG ((EFI_D_INFO, "PmCtrl Reg 0x%x\n", Fadt->Pm1aCntBlk));
-
- if (pPmTimerReg != NULL) {
- *pPmTimerReg = Fadt->PmTmrBlk;
- }
- DEBUG ((EFI_D_INFO, "PmTimer Reg 0x%x\n", Fadt->PmTmrBlk));
-
- if (pResetReg != NULL) {
- *pResetReg = (UINTN)Fadt->ResetReg.Address;
- }
- DEBUG ((EFI_D_INFO, "Reset Reg 0x%lx\n", Fadt->ResetReg.Address));
-
- if (pResetValue != NULL) {
- *pResetValue = Fadt->ResetValue;
- }
- DEBUG ((EFI_D_INFO, "Reset Value 0x%x\n", Fadt->ResetValue));
-
- if (pPmEvtReg != NULL) {
- *pPmEvtReg = Fadt->Pm1aEvtBlk;
- DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
- }
-
- if (pPmGpeEnReg != NULL) {
- *pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
- DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
- }
-
- //
- // Verify values for proper operation
- //
- ASSERT(Fadt->Pm1aCntBlk != 0);
- ASSERT(Fadt->PmTmrBlk != 0);
- ASSERT(Fadt->ResetReg.Address != 0);
- ASSERT(Fadt->Pm1aEvtBlk != 0);
- ASSERT(Fadt->Gpe0Blk != 0);
-
- DEBUG_CODE_BEGIN ();
- BOOLEAN SciEnabled;
-
- //
- // Check the consistency of SCI enabling
- //
-
- //
- // Get SCI_EN value
- //
- if (Fadt->Pm1CntLen == 4) {
- SciEnabled = (IoRead32 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
- } else {
- //
- // if (Pm1CntLen == 2), use 16 bit IO read;
- // if (Pm1CntLen != 2 && Pm1CntLen != 4), use 16 bit IO read as a fallback
- //
- SciEnabled = (IoRead16 (Fadt->Pm1aCntBlk) & BIT0)? TRUE : FALSE;
- }
-
- if (!(Fadt->Flags & EFI_ACPI_5_0_HW_REDUCED_ACPI) &&
- (Fadt->SmiCmd == 0) &&
- !SciEnabled) {
- //
- // The ACPI enabling status is inconsistent: SCI is not enabled but ACPI
- // table does not provide a means to enable it through FADT->SmiCmd
- //
- DEBUG ((DEBUG_ERROR, "ERROR: The ACPI enabling status is inconsistent: SCI is not"
- " enabled but the ACPI table does not provide a means to enable it through FADT->SmiCmd."
- " This may cause issues in OS.\n"));
- ASSERT (FALSE);
- }
- DEBUG_CODE_END ();
- return RETURN_SUCCESS;
- }
- }
- }
-
- //
- // Search Xsdt Second
- //
- Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)(Rsdp->XsdtAddress);
- if (Xsdt != NULL) {
- Entry64 = (UINT64 *)(Xsdt + 1);
- Entry64Num = (Xsdt->Length - sizeof(EFI_ACPI_DESCRIPTION_HEADER)) >> 3;
- for (Idx = 0; Idx < Entry64Num; Idx++) {
- if (*(UINT32 *)(UINTN)(Entry64[Idx]) == EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
- Fadt = (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *)(UINTN)(Entry64[Idx]);
- if (pPmCtrlReg)
- *pPmCtrlReg = Fadt->Pm1aCntBlk;
- DEBUG ((EFI_D_ERROR, "PmCtrl Reg 0x%x\n", Fadt->Pm1aCntBlk));
-
- if (pPmTimerReg)
- *pPmTimerReg = Fadt->PmTmrBlk;
- DEBUG ((EFI_D_ERROR, "PmTimer Reg 0x%x\n", Fadt->PmTmrBlk));
-
- if (pResetReg)
- *pResetReg = (UINTN)Fadt->ResetReg.Address;
- DEBUG ((EFI_D_ERROR, "Reset Reg 0x%lx\n", Fadt->ResetReg.Address));
-
- if (pResetValue)
- *pResetValue = Fadt->ResetValue;
- DEBUG ((EFI_D_ERROR, "Reset Value 0x%x\n", Fadt->ResetValue));
-
- if (pPmEvtReg != NULL) {
- *pPmEvtReg = Fadt->Pm1aEvtBlk;
- DEBUG ((EFI_D_INFO, "PmEvt Reg 0x%x\n", Fadt->Pm1aEvtBlk));
- }
-
- if (pPmGpeEnReg != NULL) {
- *pPmGpeEnReg = Fadt->Gpe0Blk + Fadt->Gpe0BlkLen / 2;
- DEBUG ((EFI_D_INFO, "PmGpeEn Reg 0x%x\n", *pPmGpeEnReg));
- }
- return RETURN_SUCCESS;
- }
- }
- }
-
- return RETURN_NOT_FOUND;
-}
-
-/**
- Find the serial port information
-
- @param pRegBase Pointer to the base address of serial port registers
- @param pRegAccessType Pointer to the access type of serial port registers
- @param pRegWidth Pointer to the register width in bytes
- @param pBaudrate Pointer to the serial port baudrate
- @param pInputHertz Pointer to the input clock frequency
- @param pUartPciAddr Pointer to the UART PCI bus, dev and func address
-
- @retval RETURN_SUCCESS Successfully find the serial port information.
- @retval RETURN_NOT_FOUND Failed to find the serial port information .
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseSerialInfo (
- OUT UINT32 *pRegBase,
- OUT UINT32 *pRegAccessType,
- OUT UINT32 *pRegWidth,
- OUT UINT32 *pBaudrate,
- OUT UINT32 *pInputHertz,
- OUT UINT32 *pUartPciAddr
- )
-{
- struct cb_serial *CbSerial;
-
- CbSerial = FindCbTag (0, CB_TAG_SERIAL);
- if (CbSerial == NULL) {
- CbSerial = FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_SERIAL);
- }
-
- if (CbSerial == NULL) {
- return RETURN_NOT_FOUND;
- }
-
- if (pRegBase != NULL) {
- *pRegBase = CbSerial->baseaddr;
- }
-
- if (pRegWidth != NULL) {
- *pRegWidth = CbSerial->regwidth;
- }
-
- if (pRegAccessType != NULL) {
- *pRegAccessType = CbSerial->type;
- }
-
- if (pBaudrate != NULL) {
- *pBaudrate = CbSerial->baud;
- }
-
- if (pInputHertz != NULL) {
- *pInputHertz = CbSerial->input_hertz;
- }
-
- if (pUartPciAddr != NULL) {
- *pUartPciAddr = CbSerial->uart_pci_addr;
- }
-
- return RETURN_SUCCESS;
-}
-
-/**
- Search for the coreboot table header
-
- @param Level Level of the search depth
- @param HeaderPtr Pointer to the pointer of coreboot table header
-
- @retval RETURN_SUCCESS Successfully find the coreboot table header .
- @retval RETURN_NOT_FOUND Failed to find the coreboot table header .
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseGetCbHeader (
- IN UINTN Level,
- OUT VOID **HeaderPtr
- )
-{
- UINTN Index;
- VOID *TempPtr;
-
- if (HeaderPtr == NULL) {
- return RETURN_NOT_FOUND;
- }
-
- TempPtr = NULL;
- for (Index = 0; Index < Level; Index++) {
- TempPtr = FindCbTag (TempPtr, CB_TAG_FORWARD);
- if (TempPtr == NULL) {
- break;
- }
- }
-
- if ((Index >= Level) && (TempPtr != NULL)) {
- *HeaderPtr = TempPtr;
- return RETURN_SUCCESS;
- }
-
- return RETURN_NOT_FOUND;
-}
-
-/**
- Find the video frame buffer information
-
- @param pFbInfo Pointer to the FRAME_BUFFER_INFO structure
-
- @retval RETURN_SUCCESS Successfully find the video frame buffer information.
- @retval RETURN_NOT_FOUND Failed to find the video frame buffer information .
-
-**/
-RETURN_STATUS
-EFIAPI
-CbParseFbInfo (
- OUT FRAME_BUFFER_INFO *pFbInfo
- )
-{
- struct cb_framebuffer *CbFbRec;
-
- if (pFbInfo == NULL) {
- return RETURN_INVALID_PARAMETER;
- }
-
- CbFbRec = FindCbTag (0, CB_TAG_FRAMEBUFFER);
- if (CbFbRec == NULL) {
- CbFbRec = FindCbTag ((VOID *)(UINTN)PcdGet32 (PcdCbHeaderPointer), CB_TAG_FRAMEBUFFER);
- }
-
- if (CbFbRec == NULL) {
- return RETURN_NOT_FOUND;
- }
-
- DEBUG ((EFI_D_INFO, "Found coreboot video frame buffer information\n"));
- DEBUG ((EFI_D_INFO, "physical_address: 0x%lx\n", CbFbRec->physical_address));
- DEBUG ((EFI_D_INFO, "x_resolution: 0x%x\n", CbFbRec->x_resolution));
- DEBUG ((EFI_D_INFO, "y_resolution: 0x%x\n", CbFbRec->y_resolution));
- DEBUG ((EFI_D_INFO, "bits_per_pixel: 0x%x\n", CbFbRec->bits_per_pixel));
- DEBUG ((EFI_D_INFO, "bytes_per_line: 0x%x\n", CbFbRec->bytes_per_line));
-
- DEBUG ((EFI_D_INFO, "red_mask_size: 0x%x\n", CbFbRec->red_mask_size));
- DEBUG ((EFI_D_INFO, "red_mask_pos: 0x%x\n", CbFbRec->red_mask_pos));
- DEBUG ((EFI_D_INFO, "green_mask_size: 0x%x\n", CbFbRec->green_mask_size));
- DEBUG ((EFI_D_INFO, "green_mask_pos: 0x%x\n", CbFbRec->green_mask_pos));
- DEBUG ((EFI_D_INFO, "blue_mask_size: 0x%x\n", CbFbRec->blue_mask_size));
- DEBUG ((EFI_D_INFO, "blue_mask_pos: 0x%x\n", CbFbRec->blue_mask_pos));
- DEBUG ((EFI_D_INFO, "reserved_mask_size: 0x%x\n", CbFbRec->reserved_mask_size));
- DEBUG ((EFI_D_INFO, "reserved_mask_pos: 0x%x\n", CbFbRec->reserved_mask_pos));
-
- pFbInfo->LinearFrameBuffer = CbFbRec->physical_address;
- pFbInfo->HorizontalResolution = CbFbRec->x_resolution;
- pFbInfo->VerticalResolution = CbFbRec->y_resolution;
- pFbInfo->BitsPerPixel = CbFbRec->bits_per_pixel;
- pFbInfo->BytesPerScanLine = (UINT16)CbFbRec->bytes_per_line;
- pFbInfo->Red.Mask = (1 << CbFbRec->red_mask_size) - 1;
- pFbInfo->Red.Position = CbFbRec->red_mask_pos;
- pFbInfo->Green.Mask = (1 << CbFbRec->green_mask_size) - 1;
- pFbInfo->Green.Position = CbFbRec->green_mask_pos;
- pFbInfo->Blue.Mask = (1 << CbFbRec->blue_mask_size) - 1;
- pFbInfo->Blue.Position = CbFbRec->blue_mask_pos;
- pFbInfo->Reserved.Mask = (1 << CbFbRec->reserved_mask_size) - 1;
- pFbInfo->Reserved.Position = CbFbRec->reserved_mask_pos;
-
- return RETURN_SUCCESS;
-}
-
diff --git a/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf b/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf deleted file mode 100644 index d31fc7b..0000000 --- a/CorebootModulePkg/Library/CbParseLib/CbParseLib.inf +++ /dev/null @@ -1,39 +0,0 @@ -## @file
-# Coreboot Table Parse Library.
-#
-# Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
-# SPDX-License-Identifier: BSD-2-Clause-Patent
-#
-##
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = CbParseLib
- FILE_GUID = 49EDFC9E-5945-4386-9C0B-C9B60CD45BB1
- MODULE_TYPE = BASE
- VERSION_STRING = 1.0
- LIBRARY_CLASS = CbParseLib
-
-#
-# The following information is for reference only and not required by the build tools.
-#
-# VALID_ARCHITECTURES = IA32 X64
-#
-
-[Sources]
- CbParseLib.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- CorebootModulePkg/CorebootModulePkg.dec
-
-[LibraryClasses]
- BaseLib
- BaseMemoryLib
- IoLib
- DebugLib
- PcdLib
-
-[Pcd]
- gUefiCorebootModulePkgTokenSpaceGuid.PcdCbHeaderPointer
\ No newline at end of file diff --git a/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.c b/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.c deleted file mode 100644 index b2db9dc..0000000 --- a/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.c +++ /dev/null @@ -1,29 +0,0 @@ -/** @file - Include all platform specific features which can be customized by IBV/OEM. - -Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> -SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include <Uefi.h> -#include <Library/BaseLib.h> -#include <Library/UefiLib.h> -#include <Library/CbPlatformSupportLib.h> - -/** - Parse platform specific information from coreboot. - - @retval RETURN_SUCCESS The platform specific coreboot support succeeded. - @retval RETURN_DEVICE_ERROR The platform specific coreboot support could not be completed. - -**/ -EFI_STATUS -EFIAPI -CbParsePlatformInfo ( - VOID - ) -{ - return EFI_SUCCESS; -} - diff --git a/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf b/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf deleted file mode 100644 index 91c5f1d..0000000 --- a/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.inf +++ /dev/null @@ -1,29 +0,0 @@ -## @file -# Include all platform specific features which can be customized by IBV/OEM. -# -# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> -# SPDX-License-Identifier: BSD-2-Clause-Patent -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = CbPlatformSupportLib - MODULE_UNI_FILE = CbPlatformSupportLibNull.uni - FILE_GUID = B42AA265-00CA-4d4b-AC14-DBD5268E1BC7 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = CbPlatformSupportLib - -# -# The following information is for reference only and not required by the build tools. -# -# VALID_ARCHITECTURES = IA32 X64 EBC -# - -[Sources] - CbPlatformSupportLibNull.c - -[Packages] - MdePkg/MdePkg.dec - CorebootModulePkg/CorebootModulePkg.dec diff --git a/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.uni b/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.uni deleted file mode 100644 index c1f5aa3..0000000 --- a/CorebootModulePkg/Library/CbPlatformSupportLibNull/CbPlatformSupportLibNull.uni +++ /dev/null @@ -1,14 +0,0 @@ -// /** @file -// NULL implementation for CbPlatformSupportLib library class interfaces. -// -// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR> -// -// SPDX-License-Identifier: BSD-2-Clause-Patent -// -// **/ - - -#string STR_MODULE_ABSTRACT #language en-US "NULL implementation for CbPlatformSupportLib library class interfaces" - -#string STR_MODULE_DESCRIPTION #language en-US "NULL implementation for CbPlatformSupportLib library class interfaces." - |