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| author | Ceping Sun <cepingx.sun@intel.com> | 2024-02-27 05:18:33 +0800 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-03-19 09:42:06 +0000 |
| commit | 35f6a2780e5198315a9f100c07b3bc86187d20a8 (patch) | |
| tree | 0de9a58005eff10d6f8c620a7a5b8bbd73ea4ab7 /Conf | |
| parent | a1a6da80aa80baecfba71a4d8e4c38dbb8f2f4d3 (diff) | |
| download | edk2-35f6a2780e5198315a9f100c07b3bc86187d20a8.zip edk2-35f6a2780e5198315a9f100c07b3bc86187d20a8.tar.gz edk2-35f6a2780e5198315a9f100c07b3bc86187d20a8.tar.bz2 | |
OvmfPkg/TdxDxe: Clear the registers before tdcall
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4696
Refer to the [GHCI] spec, TDVF should clear the BIT5 for RBP in the mask.
And TDVF should clear the regitsers to avoid leaking secrets to VMM.
Reference:
[GHCI]: TDX Guest-Host-Communication Interface v1.5
https://cdrdv2.intel.com/v1/dl/getContent/726792
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Min Xu <min.m.xu@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Michael Roth <michael.roth@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: Isaku Yamahata <isaku.yamahata@intel.com>
Signed-off-by: Ceping Sun <cepingx.sun@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Min Xu <min.m.xu@intel.com>
Diffstat (limited to 'Conf')
0 files changed, 0 insertions, 0 deletions