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| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-06-03 09:32:39 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-06-03 09:32:39 +0000 |
| commit | 23792dea0ca521e8696c7994e9cc6d04581f0b2c (patch) | |
| tree | cd16c0d235bfa0bce9c957150ce883e325f55d10 /ArmPlatformPkg/Drivers | |
| parent | 9dcfb8e5c8edb262a8e941d119af553205d38b2e (diff) | |
| download | edk2-23792dea0ca521e8696c7994e9cc6d04581f0b2c.zip edk2-23792dea0ca521e8696c7994e9cc6d04581f0b2c.tar.gz edk2-23792dea0ca521e8696c7994e9cc6d04581f0b2c.tar.bz2 | |
ArmPlatformPkg/SP804Timer: Remove the SP810 System Controller dependency
The SP804 drivers must not consider the presence of the SP810 System Controller
on the platform. The SP810 was used to enable the SP804 Dual Timers on ArmVExpress.
It is the role of the Platform specific driver to enable to the SP804 dual timers
if required.
The former SP810 initialization code has moved to ArmPlatformLib for ArmRealViewEb
and ArmVersatileExpress.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11744 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPlatformPkg/Drivers')
| -rw-r--r-- | ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c index a28a045..c7fb50d 100644 --- a/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c +++ b/ArmPlatformPkg/Drivers/SP804TimerDxe/SP804Timer.c @@ -211,9 +211,9 @@ TimerDriverSetTimerPeriod ( MmioAnd32 (SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, ~SP804_TIMER_CTRL_ENABLE); if (TimerPeriod == 0) { - // leave timer disabled from above, and... + // Leave timer disabled from above, and... - // disable timer 0/1 interrupt for a TimerPeriod of 0 + // Disable timer 0/1 interrupt for a TimerPeriod of 0 Status = gInterrupt->DisableInterruptSource (gInterrupt, gVector); } else { // Convert TimerPeriod into 1MHz clock counts (us units = 100ns units / 10) @@ -364,16 +364,13 @@ TimerInitialize ( Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt); ASSERT_EFI_ERROR (Status); - // Configure 1MHz clock - MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK); - - // configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled + // Configure timer 1 for free running operation, 32 bits, no prescaler, interrupt disabled MmioWrite32 (SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1); - // enable the free running timer + // Enable the free running timer MmioOr32 (SP804_TIMER1_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE); - // record free running tick value (should be close to 0xffffffff) + // Record free running tick value (should be close to 0xffffffff) mLastTickCount = MmioRead32 (SP804_TIMER1_BASE + SP804_TIMER_CURRENT_REG); // Disable the timer @@ -385,9 +382,6 @@ TimerInitialize ( Status = gInterrupt->RegisterInterruptSource (gInterrupt, gVector, TimerInterruptHandler); ASSERT_EFI_ERROR (Status); - // configure periodic timer (TIMER0) for 1MHz operation - MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK); - // configure timer 0 for periodic operation, 32 bits, no prescaler, and interrupt enabled MmioWrite32 (SP804_TIMER0_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_PERIODIC | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1 | SP804_TIMER_CTRL_INT_ENABLE); |