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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-11-09 13:26:32 +0000 |
---|---|---|
committer | abiesheuvel <abiesheuvel@Edk2> | 2015-11-09 13:26:32 +0000 |
commit | f97ab1bbf4c4512e1aabd149527c1aa4d5b0c03b (patch) | |
tree | 55a182b6e3cc880ceb2ebdf9c0df3e2a035b3411 /ArmPkg | |
parent | acdb6dc8b739ccddd8425e609b68871151c5b94e (diff) | |
download | edk2-f97ab1bbf4c4512e1aabd149527c1aa4d5b0c03b.zip edk2-f97ab1bbf4c4512e1aabd149527c1aa4d5b0c03b.tar.gz edk2-f97ab1bbf4c4512e1aabd149527c1aa4d5b0c03b.tar.bz2 |
ArmPkg/ArmLib: remove CCSIDR based cache info routines
The ARM architecture does not allow the actual geometries of the caches
to be inferred from the CCSIDR cache info system register, since the
geometry it reports is intended for performing cache maintenance by
set/way and nothing else. Since the ArmLib cache info routines are
based solely on CCSIDR contents, they should not be used.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18753 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg')
-rw-r--r-- | ArmPkg/Include/Library/ArmLib.h | 78 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 141 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c | 142 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/Common/ArmLib.c | 20 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c | 106 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/Null/NullArmLib.inf | 1 |
6 files changed, 0 insertions, 488 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index f1de303..2059a67 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -26,30 +26,6 @@ #error "Unknown chipset."
#endif
-typedef enum {
- ARM_CACHE_TYPE_WRITE_BACK,
- ARM_CACHE_TYPE_UNKNOWN
-} ARM_CACHE_TYPE;
-
-typedef enum {
- ARM_CACHE_ARCHITECTURE_UNIFIED,
- ARM_CACHE_ARCHITECTURE_SEPARATE,
- ARM_CACHE_ARCHITECTURE_UNKNOWN
-} ARM_CACHE_ARCHITECTURE;
-
-typedef struct {
- ARM_CACHE_TYPE Type;
- ARM_CACHE_ARCHITECTURE Architecture;
- BOOLEAN DataCachePresent;
- UINTN DataCacheSize;
- UINTN DataCacheAssociativity;
- UINTN DataCacheLineLength;
- BOOLEAN InstructionCachePresent;
- UINTN InstructionCacheSize;
- UINTN InstructionCacheAssociativity;
- UINTN InstructionCacheLineLength;
-} ARM_CACHE_INFO;
-
/**
* The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes.
*
@@ -126,66 +102,12 @@ typedef enum { #define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId))
#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK)
-ARM_CACHE_TYPE
-EFIAPI
-ArmCacheType (
- VOID
- );
-
-ARM_CACHE_ARCHITECTURE
-EFIAPI
-ArmCacheArchitecture (
- VOID
- );
-
-VOID
-EFIAPI
-ArmCacheInformation (
- OUT ARM_CACHE_INFO *CacheInfo
- );
-
-BOOLEAN
-EFIAPI
-ArmDataCachePresent (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmDataCacheSize (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmDataCacheAssociativity (
- VOID
- );
-
UINTN
EFIAPI
ArmDataCacheLineLength (
VOID
);
-BOOLEAN
-EFIAPI
-ArmInstructionCachePresent (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmInstructionCacheSize (
- VOID
- );
-
-UINTN
-EFIAPI
-ArmInstructionCacheAssociativity (
- VOID
- );
-
UINTN
EFIAPI
ArmInstructionCacheLineLength (
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c index f795a2f..4bea203 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c @@ -21,86 +21,6 @@ #include "AArch64Lib.h"
#include "ArmLibPrivate.h"
-ARM_CACHE_TYPE
-EFIAPI
-ArmCacheType (
- VOID
- )
-{
- return ARM_CACHE_TYPE_WRITE_BACK;
-}
-
-ARM_CACHE_ARCHITECTURE
-EFIAPI
-ArmCacheArchitecture (
- VOID
- )
-{
- UINT32 CLIDR = ReadCLIDR ();
-
- return (ARM_CACHE_ARCHITECTURE)CLIDR; // BugBug Fix Me
-}
-
-BOOLEAN
-EFIAPI
-ArmDataCachePresent (
- VOID
- )
-{
- UINT32 CLIDR = ReadCLIDR ();
-
- if ((CLIDR & 0x2) == 0x2) {
- // Instruction cache exists
- return TRUE;
- }
- if ((CLIDR & 0x7) == 0x4) {
- // Unified cache
- return TRUE;
- }
-
- return FALSE;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheSize (
- VOID
- )
-{
- UINT32 NumSets;
- UINT32 Associativity;
- UINT32 LineSize;
- UINT32 CCSIDR = ReadCCSIDR (0);
-
- LineSize = (1 << ((CCSIDR & 0x7) + 2));
- Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;
- NumSets = ((CCSIDR >> 13) & 0x7fff) + 1;
-
- // LineSize is in words (4 byte chunks)
- return NumSets * Associativity * LineSize * 4;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheAssociativity (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (0);
-
- return ((CCSIDR >> 3) & 0x3ff) + 1;
-}
-
-UINTN
-ArmDataCacheSets (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (0);
-
- return ((CCSIDR >> 13) & 0x7fff) + 1;
-}
-
UINTN
EFIAPI
ArmDataCacheLineLength (
@@ -113,67 +33,6 @@ ArmDataCacheLineLength ( return (1 << (CCSIDR + 2)) * 4;
}
-BOOLEAN
-EFIAPI
-ArmInstructionCachePresent (
- VOID
- )
-{
- UINT32 CLIDR = ReadCLIDR ();
-
- if ((CLIDR & 1) == 1) {
- // Instruction cache exists
- return TRUE;
- }
- if ((CLIDR & 0x7) == 0x4) {
- // Unified cache
- return TRUE;
- }
-
- return FALSE;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheSize (
- VOID
- )
-{
- UINT32 NumSets;
- UINT32 Associativity;
- UINT32 LineSize;
- UINT32 CCSIDR = ReadCCSIDR (1);
-
- LineSize = (1 << ((CCSIDR & 0x7) + 2));
- Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;
- NumSets = ((CCSIDR >> 13) & 0x7fff) + 1;
-
- // LineSize is in words (4 byte chunks)
- return NumSets * Associativity * LineSize * 4;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheAssociativity (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (1);
-
- return ((CCSIDR >> 3) & 0x3ff) + 1;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheSets (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (1);
-
- return ((CCSIDR >> 13) & 0x7fff) + 1;
-}
-
UINTN
EFIAPI
ArmInstructionCacheLineLength (
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c index 6a8f0d3..44edff8 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.c @@ -20,86 +20,6 @@ #include "ArmV7Lib.h"
#include "ArmLibPrivate.h"
-ARM_CACHE_TYPE
-EFIAPI
-ArmCacheType (
- VOID
- )
-{
- return ARM_CACHE_TYPE_WRITE_BACK;
-}
-
-ARM_CACHE_ARCHITECTURE
-EFIAPI
-ArmCacheArchitecture (
- VOID
- )
-{
- UINT32 CLIDR = ReadCLIDR ();
-
- return (ARM_CACHE_ARCHITECTURE)CLIDR; // BugBug Fix Me
-}
-
-BOOLEAN
-EFIAPI
-ArmDataCachePresent (
- VOID
- )
-{
- UINT32 CLIDR = ReadCLIDR ();
-
- if ((CLIDR & 0x2) == 0x2) {
- // Instruction cache exists
- return TRUE;
- }
- if ((CLIDR & 0x7) == 0x4) {
- // Unified cache
- return TRUE;
- }
-
- return FALSE;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheSize (
- VOID
- )
-{
- UINT32 NumSets;
- UINT32 Associativity;
- UINT32 LineSize;
- UINT32 CCSIDR = ReadCCSIDR (0);
-
- LineSize = (1 << ((CCSIDR & 0x7) + 2));
- Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;
- NumSets = ((CCSIDR >> 13) & 0x7fff) + 1;
-
- // LineSize is in words (4 byte chunks)
- return NumSets * Associativity * LineSize * 4;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheAssociativity (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (0);
-
- return ((CCSIDR >> 3) & 0x3ff) + 1;
-}
-
-UINTN
-ArmDataCacheSets (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (0);
-
- return ((CCSIDR >> 13) & 0x7fff) + 1;
-}
-
UINTN
EFIAPI
ArmDataCacheLineLength (
@@ -112,68 +32,6 @@ ArmDataCacheLineLength ( return (1 << (CCSIDR + 2)) * 4;
}
-BOOLEAN
-EFIAPI
-ArmInstructionCachePresent (
- VOID
- )
-{
- UINT32 CLIDR = ReadCLIDR ();
-
- if ((CLIDR & 1) == 1) {
- // Instruction cache exists
- return TRUE;
- }
- if ((CLIDR & 0x7) == 0x4) {
- // Unified cache
- return TRUE;
- }
-
- return FALSE;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheSize (
- VOID
- )
-{
- UINT32 NumSets;
- UINT32 Associativity;
- UINT32 LineSize;
- UINT32 CCSIDR = ReadCCSIDR (1);
-
- LineSize = (1 << ((CCSIDR & 0x7) + 2));
- Associativity = ((CCSIDR >> 3) & 0x3ff) + 1;
- NumSets = ((CCSIDR >> 13) & 0x7fff) + 1;
-
- // LineSize is in words (4 byte chunks)
- return NumSets * Associativity * LineSize * 4;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheAssociativity (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (1);
-
- return ((CCSIDR >> 3) & 0x3ff) + 1;
-// return 4;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheSets (
- VOID
- )
-{
- UINT32 CCSIDR = ReadCCSIDR (1);
-
- return ((CCSIDR >> 13) & 0x7fff) + 1;
-}
-
UINTN
EFIAPI
ArmInstructionCacheLineLength (
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c index d731697..4febc45 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLib.c +++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c @@ -23,26 +23,6 @@ VOID
EFIAPI
-ArmCacheInformation (
- OUT ARM_CACHE_INFO *CacheInfo
- )
-{
- if (CacheInfo != NULL) {
- CacheInfo->Type = ArmCacheType();
- CacheInfo->Architecture = ArmCacheArchitecture();
- CacheInfo->DataCachePresent = ArmDataCachePresent();
- CacheInfo->DataCacheSize = ArmDataCacheSize();
- CacheInfo->DataCacheAssociativity = ArmDataCacheAssociativity();
- CacheInfo->DataCacheLineLength = ArmDataCacheLineLength();
- CacheInfo->InstructionCachePresent = ArmInstructionCachePresent();
- CacheInfo->InstructionCacheSize = ArmInstructionCacheSize();
- CacheInfo->InstructionCacheAssociativity = ArmInstructionCacheAssociativity();
- CacheInfo->InstructionCacheLineLength = ArmInstructionCacheLineLength();
- }
-}
-
-VOID
-EFIAPI
ArmSetAuxCrBit (
IN UINT32 Bits
)
diff --git a/ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c b/ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c deleted file mode 100644 index 2eeb42e..0000000 --- a/ArmPkg/Library/ArmLib/Null/NullArmCacheInformation.c +++ /dev/null @@ -1,106 +0,0 @@ -/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/ArmLib.h>
-#include "ArmLibPrivate.h"
-
-ARM_CACHE_TYPE
-EFIAPI
-ArmCacheType (
- VOID
- )
-{
- return ARM_CACHE_TYPE_UNKNOWN;
-}
-
-ARM_CACHE_ARCHITECTURE
-EFIAPI
-ArmCacheArchitecture (
- VOID
- )
-{
- return ARM_CACHE_ARCHITECTURE_UNKNOWN;
-}
-
-BOOLEAN
-EFIAPI
-ArmDataCachePresent (
- VOID
- )
-{
- return FALSE;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheSize (
- VOID
- )
-{
- return 0;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheAssociativity (
- VOID
- )
-{
- return 0;
-}
-
-UINTN
-EFIAPI
-ArmDataCacheLineLength (
- VOID
- )
-{
- return 0;
-}
-
-BOOLEAN
-EFIAPI
-ArmInstructionCachePresent (
- VOID
- )
-{
- return FALSE;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheSize (
- VOID
- )
-{
- return 0;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheAssociativity (
- VOID
- )
-{
- return 0;
-}
-
-UINTN
-EFIAPI
-ArmInstructionCacheLineLength (
- VOID
- )
-{
- return 0;
-}
diff --git a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf index 36860a7..6cfb2c4 100644 --- a/ArmPkg/Library/ArmLib/Null/NullArmLib.inf +++ b/ArmPkg/Library/ArmLib/Null/NullArmLib.inf @@ -25,7 +25,6 @@ ../Common/ArmLib.c
NullArmLib.c
- NullArmCacheInformation.c
[Sources.ARM]
../Common/Arm/ArmLibSupport.S | GCC
|