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| author | Ard Biesheuvel <ardb@kernel.org> | 2023-02-10 17:52:45 +0100 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-03-16 21:14:49 +0000 |
| commit | b05523a4e9d38ec44611f8a292a061f3f992ed14 (patch) | |
| tree | c87a4798d92c913b8891ee0e7b15b7e1a98490bb /ArmPkg | |
| parent | 852227a9d52e3cb95fc34841f63eb3a3209a6726 (diff) | |
| download | edk2-b05523a4e9d38ec44611f8a292a061f3f992ed14.zip edk2-b05523a4e9d38ec44611f8a292a061f3f992ed14.tar.gz edk2-b05523a4e9d38ec44611f8a292a061f3f992ed14.tar.bz2 | |
ArmPkg/ArmMmuLib: Introduce region types for RO/XP WB cached memory
To prepare for the enablement of booting EFI with the SCTLR.WXN control
enabled, which makes all writeable memory regions non-executable by
default, introduce a memory type that we will use to describe the flash
region that carries the SEC and PEIM modules that execute in place. Even
if these are implicitly read-only due to the ROM nature, they need to be
mapped with read-only attributes in the page tables to be able to
execute from them.
Also add the XP counterpart which will be used for all normal DRAM right
at the outset.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Diffstat (limited to 'ArmPkg')
| -rw-r--r-- | ArmPkg/Include/Library/ArmLib.h | 6 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 31 | ||||
| -rw-r--r-- | ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 16 |
3 files changed, 47 insertions, 6 deletions
diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h index a53f60d..fb1ae57 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -35,6 +35,12 @@ typedef enum { // Do NOT use below two attributes if you are not sure.
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE,
+ // Special region types for memory that must be mapped with read-only or
+ // non-execute permissions from the very start, e.g., to support the use
+ // of the WXN virtual memory control.
+ ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO,
+ ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_XP,
+
ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH,
ARM_MEMORY_REGION_ATTRIBUTE_DEVICE,
} ARM_MEMORY_REGION_ATTRIBUTES;
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c index ee4c5c9..7acfd2e 100644 --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c @@ -37,12 +37,35 @@ ArmMemoryAttributeToPageAttribute ( IN ARM_MEMORY_REGION_ATTRIBUTES Attributes
)
{
+ UINT64 Permissions;
+
+ switch (Attributes) {
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO:
+ Permissions = TT_AP_NO_RO;
+ break;
+
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_XP:
+ case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
+ if (ArmReadCurrentEL () == AARCH64_EL2) {
+ Permissions = TT_XN_MASK;
+ } else {
+ Permissions = TT_UXN_MASK | TT_PXN_MASK;
+ }
+
+ break;
+ default:
+ Permissions = 0;
+ break;
+ }
+
switch (Attributes) {
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_NONSHAREABLE:
return TT_ATTR_INDX_MEMORY_WRITE_BACK;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK:
- return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO:
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_XP:
+ return TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE | Permissions;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
return TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE;
@@ -54,11 +77,7 @@ ArmMemoryAttributeToPageAttribute ( default:
ASSERT (0);
case ARM_MEMORY_REGION_ATTRIBUTE_DEVICE:
- if (ArmReadCurrentEL () == AARCH64_EL2) {
- return TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK;
- } else {
- return TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK;
- }
+ return TT_ATTR_INDX_DEVICE_MEMORY | Permissions;
}
}
diff --git a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c index 1542983..00c5f42 100644 --- a/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c +++ b/ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c @@ -106,6 +106,14 @@ PopulateLevel2PageTable ( PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
PageAttributes &= ~TT_DESCRIPTOR_PAGE_S_SHARED;
break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO:
+ PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
+ PageAttributes |= TT_DESCRIPTOR_PAGE_AP_NO_RO;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_XP:
+ PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_BACK;
+ PageAttributes |= TT_DESCRIPTOR_PAGE_XN_MASK;
+ break;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
PageAttributes = TT_DESCRIPTOR_PAGE_WRITE_THROUGH;
break;
@@ -240,6 +248,14 @@ FillTranslationTable ( Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK;
Attributes &= ~TT_DESCRIPTOR_SECTION_S_SHARED;
break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_RO:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK;
+ Attributes |= TT_DESCRIPTOR_SECTION_AP_NO_RO;
+ break;
+ case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK_XP:
+ Attributes = TT_DESCRIPTOR_SECTION_WRITE_BACK;
+ Attributes |= TT_DESCRIPTOR_SECTION_XN_MASK;
+ break;
case ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH:
Attributes = TT_DESCRIPTOR_SECTION_WRITE_THROUGH;
break;
|