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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-11-09 13:28:33 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-11-09 13:28:33 +0000 |
| commit | 07c707858d2547aff283f2e639559627f98d3a9c (patch) | |
| tree | 81fb15aaad588769323f22b048c8c7e8a406a7a4 /ArmPkg | |
| parent | c653fc2a91a946ea249e5d6161bca84f6c824f09 (diff) | |
| download | edk2-07c707858d2547aff283f2e639559627f98d3a9c.zip edk2-07c707858d2547aff283f2e639559627f98d3a9c.tar.gz edk2-07c707858d2547aff283f2e639559627f98d3a9c.tar.bz2 | |
ArmPkg/ArmDmaLib: use the cache writeback granularity for alignment
When allocating memory to perform non-coherent DMA, use the cache
writeback granule rather than the data cache linesize for alignment.
This prevents the explicit cache maintenance from corrupting
unrelated adjacent data if the cache writeback granule exceeds
the cache linesize.
Reported-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18759 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg')
| -rwxr-xr-x | ArmPkg/Library/ArmDmaLib/ArmDmaLib.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c index 12b1940..54a49a1 100755 --- a/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c +++ b/ArmPkg/Library/ArmDmaLib/ArmDmaLib.c @@ -277,7 +277,7 @@ ArmDmaLibConstructor ( Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&gCpu);
ASSERT_EFI_ERROR(Status);
- gCacheAlignment = ArmDataCacheLineLength ();
+ gCacheAlignment = ArmCacheWritebackGranule ();
return Status;
}
|