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authorPierre Gondois <pierre.gondois@arm.com>2022-08-23 18:00:09 +0200
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>2022-09-05 13:52:51 +0000
commit05db766bee88c1db2ebe9566eb088cceb05fed93 (patch)
tree00ceb78e16decf1b016a939456e9657dc695ce8b /ArmPkg/Library
parent1926702c95634eb60ef237b01b444535039d735f (diff)
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ArmPkg: Remove duplicated words
In an effort to clean the documentation of the above package, remove duplicated words, and fix a typo while at it. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.muajwar@arm.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com>
Diffstat (limited to 'ArmPkg/Library')
-rw-r--r--ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
index 4a05133..e5ecc73 100644
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c
@@ -613,7 +613,7 @@ ArmConfigureMmu (
// loss of coherency when using mismatched attributes, and given that memory
// is mapped cacheable except for extraordinary cases (such as non-coherent
// DMA), have the page table walker perform cached accesses as well, and
- // assert below that that matches the attributes we use for CPU accesses to
+ // assert below that matches the attributes we use for CPU accesses to
// the region.
//
TCR |= TCR_SH_INNER_SHAREABLE |