ArmPkg/ArmLib ArmMmuLib: Drop support for EL3/MON execution

Drop logic from the ARM architectural support libraries that can only
execute in EL3 on AArch64 or Monitor mode on 32-bit ARM. While early
32-bit ports (and even some early 64-bit code) included some monitor
logic in EDK2, UEFI per the spec runs in non-secure execution contexts
only, and secure monitor and other secure world duties are usually
delegated to TF-A (Trusted Firmware for the A profile).

Since there are no longer users of this code in EDK2 or the
edk2-platforms tree, let's remove it from the core support libraries.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

1 files changed, 2 insertions, 11 deletions

diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
index f5cbc2e..de9d331 100644
--- a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
+++ b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
@@ -260,7 +260,7 @@ ASM_PFX(ExceptionHandlersEnd):
 

 ASM_PFX(CommonExceptionEntry):

 

-  EL1_OR_EL2_OR_EL3(x1)

+  EL1_OR_EL2(x1)

 1:mrs      x2, elr_el1   // Exception Link Register

   mrs      x3, spsr_el1  // Saved Processor Status Register 32bit

   mrs      x5, esr_el1   // EL1 Exception syndrome register 32bit

@@ -271,12 +271,6 @@ ASM_PFX(CommonExceptionEntry):
   mrs      x3, spsr_el2  // Saved Processor Status Register 32bit

   mrs      x5, esr_el2   // EL2 Exception syndrome register 32bit

   mrs      x6, far_el2   // EL2 Fault Address Register

-  b        4f

-

-3:mrs      x2, elr_el3   // Exception Link Register

-  mrs      x3, spsr_el3  // Saved Processor Status Register 32bit

-  mrs      x5, esr_el3   // EL3 Exception syndrome register 32bit

-  mrs      x6, far_el3   // EL3 Fault Address Register

 

 4:mrs      x4, fpsr      // Floating point Status Register  32bit

 

@@ -365,15 +359,12 @@ ASM_PFX(CommonExceptionEntry):
   msr   daifset, #3

   isb

 

-  EL1_OR_EL2_OR_EL3(x28)

+  EL1_OR_EL2(x28)

 1:msr      elr_el1, x29  // Exception Link Register

   msr      spsr_el1, x30 // Saved Processor Status Register 32bit

   b        4f

 2:msr      elr_el2, x29  // Exception Link Register

   msr      spsr_el2, x30 // Saved Processor Status Register 32bit

-  b        4f

-3:msr      elr_el3, x29  // Exception Link Register

-  msr      spsr_el3, x30 // Saved Processor Status Register 32bit

 4:

 

   // pop remaining GP regs and return from exception.