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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-06-22 16:23:57 +0200 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2016-06-23 16:16:00 +0200 |
| commit | c7fefb690661f2e38afcb8200bd318ecf38ab961 (patch) | |
| tree | fb291c0a93b9bde840e8d1dbd7c72576e770202f /ArmPkg/Include | |
| parent | bf57a42a0e2cf1c68e9db2f61c82ce93c806ab07 (diff) | |
| download | edk2-c7fefb690661f2e38afcb8200bd318ecf38ab961.zip edk2-c7fefb690661f2e38afcb8200bd318ecf38ab961.tar.gz edk2-c7fefb690661f2e38afcb8200bd318ecf38ab961.tar.bz2 | |
ArmPkg/ArmGicV3Dxe: configure all interrupts as non-secure Group-1
Reassign all interrupts to non-secure Group-1 if the GIC has its DS
(Disable Security) bit set. In this case, it is safe to assume that we
own the GIC, and that no other firmware has performed any configuration
yet, which means it is up to us to reconfigure the interrupts so they
can be taken by the non-secure firmware.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'ArmPkg/Include')
| -rw-r--r-- | ArmPkg/Include/Library/ArmGicLib.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h index 10c4a9d..4364f3f 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -47,8 +47,9 @@ // GICv3 specific registers
#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers
-// the Affinity Routing Enable (ARE) bit in GICD_CTLR
-#define ARM_GIC_ICDDCR_ARE (1 << 4)
+// GICD_CTLR bits
+#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE)
+#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS)
//
// GIC Redistributor
|