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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-07-28 20:44:44 +0000 |
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committer | abiesheuvel <abiesheuvel@Edk2> | 2015-07-28 20:44:44 +0000 |
commit | 8d13298b8008ff62e107deb2a293ea267943a977 (patch) | |
tree | 6db916ee95b3878617f5cce0c8fcec2525e9e106 /ArmPkg/Drivers | |
parent | bce29e305979859de6ac61658a828f2e50316a34 (diff) | |
download | edk2-8d13298b8008ff62e107deb2a293ea267943a977.zip edk2-8d13298b8008ff62e107deb2a293ea267943a977.tar.gz edk2-8d13298b8008ff62e107deb2a293ea267943a977.tar.bz2 |
ArmPkg: split off ArmGicArchLib from ArmGicLib
The current implementation of ArmGicGetSupportedArchRevision ()
that is used by all ARM platforms is entirely stateless (in order
to support being executed from flash) so it needs to interrogate
the hardware for the supported GIC revision upon each invocation.
However, this statelessness is only needed for SEC type modules;
in all other cases, we could easily determine the GIC revision once,
and store the result in a global variable.
In preparation of having separate early and normal versions, this patch
introduces the ArmGicArchLib library class and default implementation,
and moves the existing ArmGicGetSupportedArchRevision () into it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18098 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers')
-rw-r--r-- | ArmPkg/Drivers/ArmGic/AArch64/ArmGicArchLib.c | 51 | ||||
-rw-r--r-- | ArmPkg/Drivers/ArmGic/Arm/ArmGicArchLib.c | 51 | ||||
-rw-r--r-- | ArmPkg/Drivers/ArmGic/ArmGicLib.inf | 3 | ||||
-rw-r--r-- | ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf | 3 |
4 files changed, 2 insertions, 106 deletions
diff --git a/ArmPkg/Drivers/ArmGic/AArch64/ArmGicArchLib.c b/ArmPkg/Drivers/ArmGic/AArch64/ArmGicArchLib.c deleted file mode 100644 index 0e0fa3b..0000000 --- a/ArmPkg/Drivers/ArmGic/AArch64/ArmGicArchLib.c +++ /dev/null @@ -1,51 +0,0 @@ -/** @file
-*
-* Copyright (c) 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmGicLib.h>
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- )
-{
- UINT32 IccSre;
-
- // Ideally we would like to use the GICC IIDR Architecture version here, but
- // this does not seem to be very reliable as the implementation could easily
- // get it wrong. It is more reliable to check if the GICv3 System Register
- // feature is implemented on the CPU. This is also convenient as our GICv3
- // driver requires SRE. If only Memory mapped access is available we try to
- // drive the GIC as a v2.
- if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC) {
- // Make sure System Register access is enabled (SRE). This depends on the
- // higher privilege level giving us permission, otherwise we will either
- // cause an exception here, or the write doesn't stick in which case we need
- // to fall back to the GICv2 MMIO interface.
- // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
- // at the same exception level.
- // It is the OS responsibility to set this bit.
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- if (!(IccSre & ICC_SRE_EL2_SRE)) {
- ArmGicV3SetControlSystemRegisterEnable (IccSre | ICC_SRE_EL2_SRE);
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- }
- if (IccSre & ICC_SRE_EL2_SRE) {
- return ARM_GIC_ARCH_REVISION_3;
- }
- }
-
- return ARM_GIC_ARCH_REVISION_2;
-}
diff --git a/ArmPkg/Drivers/ArmGic/Arm/ArmGicArchLib.c b/ArmPkg/Drivers/ArmGic/Arm/ArmGicArchLib.c deleted file mode 100644 index f256de7..0000000 --- a/ArmPkg/Drivers/ArmGic/Arm/ArmGicArchLib.c +++ /dev/null @@ -1,51 +0,0 @@ -/** @file
-*
-* Copyright (c) 2014, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials are licensed and made available
-* under the terms and conditions of the BSD License which accompanies this
-* distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
-*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-#include <Library/ArmLib.h>
-#include <Library/ArmGicLib.h>
-
-ARM_GIC_ARCH_REVISION
-EFIAPI
-ArmGicGetSupportedArchRevision (
- VOID
- )
-{
- UINT32 IccSre;
-
- // Ideally we would like to use the GICC IIDR Architecture version here, but
- // this does not seem to be very reliable as the implementation could easily
- // get it wrong. It is more reliable to check if the GICv3 System Register
- // feature is implemented on the CPU. This is also convenient as our GICv3
- // driver requires SRE. If only Memory mapped access is available we try to
- // drive the GIC as a v2.
- if (ArmReadIdPfr1 () & ARM_PFR1_GIC) {
- // Make sure System Register access is enabled (SRE). This depends on the
- // higher privilege level giving us permission, otherwise we will either
- // cause an exception here, or the write doesn't stick in which case we need
- // to fall back to the GICv2 MMIO interface.
- // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
- // at the same exception level.
- // It is the OS responsibility to set this bit.
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- if (!(IccSre & ICC_SRE_EL2_SRE)) {
- ArmGicV3SetControlSystemRegisterEnable (IccSre| ICC_SRE_EL2_SRE);
- IccSre = ArmGicV3GetControlSystemRegisterEnable ();
- }
- if (IccSre & ICC_SRE_EL2_SRE) {
- return ARM_GIC_ARCH_REVISION_3;
- }
- }
-
- return ARM_GIC_ARCH_REVISION_2;
-}
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicLib.inf index 2ae3fd3..047adac 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.inf @@ -27,18 +27,17 @@ GicV2/ArmGicV2NonSecLib.c
[Sources.ARM]
- Arm/ArmGicArchLib.c
GicV3/Arm/ArmGicV3.S | GCC
GicV3/Arm/ArmGicV3.asm | RVCT
[Sources.AARCH64]
- AArch64/ArmGicArchLib.c
GicV3/AArch64/ArmGicV3.S
[LibraryClasses]
ArmLib
DebugLib
IoLib
+ ArmGicArchLib
[Packages]
ArmPkg/ArmPkg.dec
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf index 7d4e49e..fc2e1bc 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf +++ b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf @@ -27,12 +27,10 @@ GicV2/ArmGicV2SecLib.c
[Sources.ARM]
- Arm/ArmGicArchLib.c
GicV3/Arm/ArmGicV3.S | GCC
GicV3/Arm/ArmGicV3.asm | RVCT
[Sources.AARCH64]
- AArch64/ArmGicArchLib.c
GicV3/AArch64/ArmGicV3.S
[Packages]
@@ -45,6 +43,7 @@ ArmLib
DebugLib
IoLib
+ ArmGicArchLib
[Pcd]
gArmPlatformTokenSpaceGuid.PcdCoreCount
|