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authorOlivier Martin <olivier.martin@arm.com>2013-06-27 18:16:06 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2013-06-27 18:16:06 +0000
commit6f050ad6bf16f3f2ae2f0b62e93404230de575cc (patch)
tree0a71ac274cf21011bd82f9a1cd0eea5037cdbde9 /ArmPkg/Drivers
parentca79c798217775368b6c6a0d0720f221ed2a62ef (diff)
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ArmPkg: Made ArmConfigureMmu() returns a status code
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers')
-rwxr-xr-xArmPkg/Drivers/CpuPei/CpuPei.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.c b/ArmPkg/Drivers/CpuPei/CpuPei.c
index f358cb8..e984f5f 100755
--- a/ArmPkg/Drivers/CpuPei/CpuPei.c
+++ b/ArmPkg/Drivers/CpuPei/CpuPei.c
@@ -2,7 +2,7 @@
Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
-Copyright (c) 2011, ARM Limited. All rights reserved.<BR>
+Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -137,7 +137,10 @@ ConfigureMmu (
SystemMemoryBase, SystemMemoryLength/1024/1024,
(CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
- ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+ Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU (error code: %r)\n", Status));
+ }
BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
}