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authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-04 10:02:49 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2011-07-04 10:02:49 +0000
commit1c1e70fa6e1e986992afbb282d048483cbe0b319 (patch)
tree6cadc350b66d6a76d96e165c277fa64f98cf5cce /ArmPkg/Drivers
parentf3de0a607dd36d045ef8d1782db5e9c296cf6b43 (diff)
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ArmPkg/BdsLib: Linux kernel supports either FDT or ATAG
If a FDT blob is passed to the kernel it is required we can load it. If we fail to load the binary then we must abort the Linux booting process. ArmPkg/CpuDxe: Ensure the reset vector passed to the CP15 VBAR register is aligned on the right boundary git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11968 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers')
-rw-r--r--ArmPkg/Drivers/CpuDxe/Exception.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/Exception.c b/ArmPkg/Drivers/CpuDxe/Exception.c
index 2f7e1b6..55a7132 100644
--- a/ArmPkg/Drivers/CpuDxe/Exception.c
+++ b/ArmPkg/Drivers/CpuDxe/Exception.c
@@ -206,10 +206,13 @@ InitializeExceptions (
//Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory.
// The Vector Base Address Register defines the location
- ArmWriteVBar(PcdGet32(PcdCpuVectorBaseAddress));
+ ArmWriteVBar (PcdGet32(PcdCpuVectorBaseAddress));
} else {
+ // The Vector table must be 32-byte aligned
+ ASSERT(((UINT32)ExceptionHandlersStart & ((1 << 5)-1)) == 0);
+
// We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.
- ArmWriteVBar((UINT32)ExceptionHandlersStart);
+ ArmWriteVBar ((UINT32)ExceptionHandlersStart);
}
if (FiqEnabled) {