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authorAJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524>2010-01-14 23:39:29 +0000
committerAJFISH <AJFISH@6f19259b-4bc3-4df7-8a09-765794883524>2010-01-14 23:39:29 +0000
commit225290eba733e5ca7149d1789ccce5ef15c38df5 (patch)
treeaead584e85f8169bea5b4282e66b047706e42569 /ArmPkg/Drivers/CpuDxe/Mmu.c
parent7c1c4dcf78041c489abc3314f19775929b7c8d29 (diff)
downloadedk2-225290eba733e5ca7149d1789ccce5ef15c38df5.zip
edk2-225290eba733e5ca7149d1789ccce5ef15c38df5.tar.gz
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Added new PeCoffGetEntryPoint lib function to get size of PE/COFF header. This is needed for debug prints with PE/COFF images that started as ELF or Mach-O. Moved and debugged ARM semihosting lib for RVD that prints out the debugger symbol load commands in a window on the debugger. Trying to write a script file, but that crashes RVD. Added debug print to BeagleBoard Sec that prints out RVD debugger command to load symbols for the Sec. Synced the rest of the code.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9763 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ArmPkg/Drivers/CpuDxe/Mmu.c')
-rw-r--r--ArmPkg/Drivers/CpuDxe/Mmu.c26
1 files changed, 9 insertions, 17 deletions
diff --git a/ArmPkg/Drivers/CpuDxe/Mmu.c b/ArmPkg/Drivers/CpuDxe/Mmu.c
index a0977dd..55e0498 100644
--- a/ArmPkg/Drivers/CpuDxe/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/Mmu.c
@@ -16,10 +16,6 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#include "CpuDxe.h"
-//
-// For debug switch me back to to EFI_D_PAGE when done
-//
-#define L_EFI_D_PAGE EFI_D_ERROR
//
// Translation/page table definitions
@@ -353,7 +349,7 @@ SyncCacheConfig (
EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap;
- DEBUG ((L_EFI_D_PAGE, "SyncCacheConfig()\n"));
+ DEBUG ((EFI_D_PAGE, "SyncCacheConfig()\n"));
// This code assumes MMU is enabled and filed with section translations
ASSERT (ArmMmuEnabled ());
@@ -483,7 +479,7 @@ UpdatePageEntries (
// Cause a page fault if these ranges are accessed.
EntryMask = 0x3;
EntryValue = 0;
- DEBUG ((L_EFI_D_PAGE, "SetMemoryAttributes(): setting page %lx with unsupported attribute %x will page fault on access\n", BaseAddress, Attributes));
+ DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): setting page %lx with unsupported attribute %x will page fault on access\n", BaseAddress, Attributes));
break;
default:
@@ -617,7 +613,7 @@ UpdateSectionEntries (
// cannot be implemented UEFI definition unclear for ARM
// Cause a page fault if these ranges are accessed.
EntryValue = ARM_DESC_TYPE_FAULT;
- DEBUG ((L_EFI_D_PAGE, "SetMemoryAttributes(): setting section %lx with unsupported attribute %x will page fault on access\n", BaseAddress, Attributes));
+ DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): setting section %lx with unsupported attribute %x will page fault on access\n", BaseAddress, Attributes));
break;
@@ -680,7 +676,7 @@ ConvertSectionToPages (
volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable;
volatile ARM_PAGE_TABLE_ENTRY *PageTable;
- DEBUG ((L_EFI_D_PAGE, "Converting section at 0x%x to pages\n", (UINTN)BaseAddress));
+ DEBUG ((EFI_D_PAGE, "Converting section at 0x%x to pages\n", (UINTN)BaseAddress));
// obtain page table base
FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTranslationTableBaseAddress ();
@@ -727,10 +723,6 @@ ConvertSectionToPages (
}
// flush d-cache so descriptors make it back to uncached memory for subsequent table walks
- // TODO: change to use only PageTable base and length
- // ArmInvalidateDataCache ();
-DEBUG ((EFI_D_ERROR, "InvalidateDataCacheRange (%x, %x)\n", (UINTN)PageTableAddr, EFI_PAGE_SIZE));
-
InvalidateDataCacheRange ((VOID *)(UINTN)PageTableAddr, EFI_PAGE_SIZE);
// formulate page table entry, Domain=0, NS=0
@@ -756,11 +748,11 @@ SetMemoryAttributes (
if(((BaseAddress & 0xFFFFF) == 0) && ((Length & 0xFFFFF) == 0)) {
// is the base and length a multiple of 1 MB?
- DEBUG ((L_EFI_D_PAGE, "SetMemoryAttributes(): MMU section 0x%x length 0x%x to %lx\n", (UINTN)BaseAddress, (UINTN)Length, Attributes));
+ DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): MMU section 0x%x length 0x%x to %lx\n", (UINTN)BaseAddress, (UINTN)Length, Attributes));
Status = UpdateSectionEntries (BaseAddress, Length, Attributes, VirtualMask);
} else {
// base and/or length is not a multiple of 1 MB
- DEBUG ((L_EFI_D_PAGE, "SetMemoryAttributes(): MMU page 0x%x length 0x%x to %lx\n", (UINTN)BaseAddress, (UINTN)Length, Attributes));
+ DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(): MMU page 0x%x length 0x%x to %lx\n", (UINTN)BaseAddress, (UINTN)Length, Attributes));
Status = UpdatePageEntries (BaseAddress, Length, Attributes, VirtualMask);
}
@@ -807,10 +799,10 @@ CpuSetMemoryAttributes (
IN UINT64 Attributes
)
{
- DEBUG ((L_EFI_D_PAGE, "SetMemoryAttributes(%lx, %lx, %lx)\n", BaseAddress, Length, Attributes));
+ DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(%lx, %lx, %lx)\n", BaseAddress, Length, Attributes));
if ( ((BaseAddress & (EFI_PAGE_SIZE-1)) != 0) || ((Length & (EFI_PAGE_SIZE-1)) != 0)){
// minimum granularity is EFI_PAGE_SIZE (4KB on ARM)
- DEBUG ((L_EFI_D_PAGE, "SetMemoryAttributes(%lx, %lx, %lx): minimum ganularity is EFI_PAGE_SIZE\n", BaseAddress, Length, Attributes));
+ DEBUG ((EFI_D_PAGE, "SetMemoryAttributes(%lx, %lx, %lx): minimum ganularity is EFI_PAGE_SIZE\n", BaseAddress, Length, Attributes));
return EFI_UNSUPPORTED;
}
@@ -843,7 +835,7 @@ CpuConvertPagesToUncachedVirtualAddress (
*Attributes = GcdDescriptor.Attributes;
}
}
-ASSERT (FALSE);
+
//
// Make this address range page fault if accessed. If it is a DMA buffer than this would
// be the PCI address. Code should always use the CPU address, and we will or in VirtualMask