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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2018-06-06 14:32:42 +0200
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2018-06-15 18:18:37 +0200
commitdde2dd64f07041c2ccc23dc7a5a846e667b7bb1a (patch)
treee9e7a0dacb660f6bf63f9a595a99ecc098fef458
parentcae823161249198976a7e8c2711d39f3832a09cd (diff)
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ArmPkg/ArmSmcPsciResetSystemLib: implement fallback for warm reboot
Implement ResetSystemLib's EnterS3WithImmediateWake() routine using a jump back to the PEI entry point with interrupts and MMU+caches disabled. This is only possible at boot time, when we are sure that the current CPU is the only one up and running. Also, it depends on the platform whether the PEI code is preserved in memory (it may be copied to DRAM rather than execute in place), so also add a feature PCD to selectively enable this feature. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
-rw-r--r--ArmPkg/ArmPkg.dec4
-rw-r--r--ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c21
-rw-r--r--ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf9
3 files changed, 32 insertions, 2 deletions
diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec
index debe066..3aa229f 100644
--- a/ArmPkg/ArmPkg.dec
+++ b/ArmPkg/ArmPkg.dec
@@ -85,6 +85,10 @@
# Define if the GICv3 controller should use the GICv2 legacy
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
+ # Whether to implement warm reboot for capsule update using a jump back to the
+ # PEI entry point with caches and interrupts disabled.
+ gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot|FALSE|BOOLEAN|0x0000001F
+
[PcdsFeatureFlag.ARM]
# Whether to map normal memory as non-shareable. FALSE is the safe choice, but
# TRUE may be appropriate to fix performance problems if you don't care about
diff --git a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c
index d6d26bc..10ceafd 100644
--- a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c
+++ b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.c
@@ -15,10 +15,13 @@
#include <PiDxe.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/ArmSmcLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/ResetSystemLib.h>
-#include <Library/ArmSmcLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeLib.h>
#include <IndustryStandard/ArmStdSmc.h>
@@ -89,7 +92,21 @@ EnterS3WithImmediateWake (
VOID
)
{
- // Not implemented
+ VOID (*Reset)(VOID);
+
+ if (FeaturePcdGet (PcdArmReenterPeiForCapsuleWarmReboot) &&
+ !EfiAtRuntime ()) {
+ //
+ // At boot time, we are the only core running, so we can implement the
+ // immediate wake (which is used by capsule update) by disabling the MMU
+ // and interrupts, and jumping to the PEI entry point.
+ //
+ Reset = (VOID (*)(VOID))(UINTN)FixedPcdGet64 (PcdFvBaseAddress);
+
+ gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ ArmDisableMmu ();
+ Reset ();
+ }
}
/**
diff --git a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
index 5a1ee97..19021cd 100644
--- a/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
+++ b/ArmPkg/Library/ArmSmcPsciResetSystemLib/ArmSmcPsciResetSystemLib.inf
@@ -30,6 +30,15 @@
MdePkg/MdePkg.dec
[LibraryClasses]
+ ArmMmuLib
ArmSmcLib
BaseLib
DebugLib
+ UefiBootServicesTableLib
+ UefiRuntimeLib
+
+[FeaturePcd]
+ gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdFvBaseAddress