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| author | VarshitPandya <varshit.pandya@arm.com> | 2025-03-31 16:31:40 +0100 |
|---|---|---|
| committer | Liming Gao <gaoliming@byosoft.com.cn> | 2025-05-26 09:06:15 +0800 |
| commit | c04c2514afc13ce5fcacabfdac8d058385d08d9e (patch) | |
| tree | d352a64333e3b52aaff09eeaf2a2fc405797b5a6 | |
| parent | 3e2c650da55ca1173f6c142f467f4b20c937c8e4 (diff) | |
| download | edk2-c04c2514afc13ce5fcacabfdac8d058385d08d9e.zip edk2-c04c2514afc13ce5fcacabfdac8d058385d08d9e.tar.gz edk2-c04c2514afc13ce5fcacabfdac8d058385d08d9e.tar.bz2 | |
MdePkg: Add comment describing address parameter in PciSegmentLib
MdePkg/Include/Library/PciSegmentLib.h includes address parameter definition,
add the same comment here for explaining the INVALID_PCI_SEGMENT_ADDRESS flag.
Signed-off-by: VarshitPandya <varshit.pandya@arm.com>
3 files changed, 36 insertions, 0 deletions
diff --git a/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c b/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c index 5946bdc..2fadf9e 100644 --- a/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c +++ b/MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c @@ -19,6 +19,18 @@ and the segment should be 0.
@param A The address to validate.
+ Layout of this address parameter is as follows:
+
+ PCI Register: Bits 0..11
+ PCI Function Bits 12..14
+ PCI Device Bits 15..19
+ PCI Bus Bits 20..27
+ Reserved Bits 28..31. Must be 0.
+ PCI Segment Bits 32..47
+ Reserved Bits 48..63. Must be 0.
+
+ | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |
+ 63 48 47 32 31 28 27 20 19 15 14 12 11 0
@param M Additional bits to assert to be zero.
**/
diff --git a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c index 80cddbe..3527c7d 100644 --- a/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c +++ b/MdePkg/Library/PeiPciSegmentLibPciCfg2/PciSegmentLib.c @@ -21,6 +21,18 @@ A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
@param A The address to validate.
+ Layout of this address parameter is as follows:
+
+ PCI Register: Bits 0..11
+ PCI Function Bits 12..14
+ PCI Device Bits 15..19
+ PCI Bus Bits 20..27
+ Reserved Bits 28..31. Must be 0.
+ PCI Segment Bits 32..47
+ Reserved Bits 48..63. Must be 0.
+
+ | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |
+ 63 48 47 32 31 28 27 20 19 15 14 12 11 0
@param M Additional bits to assert to be zero.
**/
diff --git a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h index 8c2f6b4..f243036 100644 --- a/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h +++ b/MdePkg/Library/UefiPciSegmentLibPciRootBridgeIo/PciSegmentLib.h @@ -31,6 +31,18 @@ typedef struct { A valid PCI Segment address should not contain 1's in bits 28..31 and 48..63
@param A The address to validate.
+ Layout of this address parameter is as follows:
+
+ PCI Register: Bits 0..11
+ PCI Function Bits 12..14
+ PCI Device Bits 15..19
+ PCI Bus Bits 20..27
+ Reserved Bits 28..31. Must be 0.
+ PCI Segment Bits 32..47
+ Reserved Bits 48..63. Must be 0.
+
+ | Reserved (MBZ) | Segment | Reserved (MBZ) | Bus | Device | Function | Register |
+ 63 48 47 32 31 28 27 20 19 15 14 12 11 0
@param M Additional bits to assert to be zero.
**/
|