UefiCpuPkg BaseXApic(X2)Lib: Add ASSERT if local APIC not software enabled

Add an ASSERT in GetApicTimerState() to check if the local APIC is
software enabled.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18595 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 19 insertions, 1 deletions

diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
index f219b07..08bcef7 100644
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
@@ -723,6 +723,8 @@ InitializeApicTimer (
 /**

   Get the state of the local APIC timer.

 

+  This function will ASSERT if the local APIC is not software enabled.

+

   @param DivideValue   Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.

   @param PeriodicMode  Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.

   @param Vector        Return the timer interrupt vector number.

@@ -739,6 +741,13 @@ GetApicTimerState (
   LOCAL_APIC_DCR Dcr;

   LOCAL_APIC_LVT_TIMER LvtTimer;

 

+  //

+  // Check the APIC Software Enable/Disable bit (bit 8) in Spurious-Interrupt

+  // Vector Register.

+  // This bit will be 1, if local APIC is software enabled.

+  //

+  ASSERT ((ReadLocalApicReg(XAPIC_SPURIOUS_VECTOR_OFFSET) & BIT8) != 0);

+

   if (DivideValue != NULL) {

     Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);

     Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 8c6e8d7..1a91116 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -4,7 +4,7 @@
   This local APIC library instance supports x2APIC capable processors

   which have xAPIC and x2APIC modes.

 

-  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -818,6 +818,8 @@ InitializeApicTimer (
 /**

   Get the state of the local APIC timer.

 

+  This function will ASSERT if the local APIC is not software enabled.

+

   @param DivideValue   Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.

   @param PeriodicMode  Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.

   @param Vector        Return the timer interrupt vector number.

@@ -834,6 +836,13 @@ GetApicTimerState (
   LOCAL_APIC_DCR Dcr;

   LOCAL_APIC_LVT_TIMER LvtTimer;

 

+  //

+  // Check the APIC Software Enable/Disable bit (bit 8) in Spurious-Interrupt

+  // Vector Register.

+  // This bit will be 1, if local APIC is software enabled.

+  //

+  ASSERT ((ReadLocalApicReg(XAPIC_SPURIOUS_VECTOR_OFFSET) & BIT8) != 0);

+

   if (DivideValue != NULL) {

     Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);

     Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);