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| author | Gerd Hoffmann <kraxel@redhat.com> | 2024-01-25 08:36:57 +0100 |
|---|---|---|
| committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2024-06-26 06:04:49 +0000 |
| commit | 5bef25dca4119ae9bd537480d703575ad166723a (patch) | |
| tree | 9af0bc6394733e47386218163e20bdaf0dfc651b | |
| parent | ce4c76e46d52e24551f4986bded4c9b764502200 (diff) | |
| download | edk2-5bef25dca4119ae9bd537480d703575ad166723a.zip edk2-5bef25dca4119ae9bd537480d703575ad166723a.tar.gz edk2-5bef25dca4119ae9bd537480d703575ad166723a.tar.bz2 | |
MdePkg/ArchitecturalMsr.h: add #defines for MTRR cache types
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
| -rw-r--r-- | MdePkg/Include/Register/Intel/ArchitecturalMsr.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/MdePkg/Include/Register/Intel/ArchitecturalMsr.h b/MdePkg/Include/Register/Intel/ArchitecturalMsr.h index 4715c59..faabf0c 100644 --- a/MdePkg/Include/Register/Intel/ArchitecturalMsr.h +++ b/MdePkg/Include/Register/Intel/ArchitecturalMsr.h @@ -2103,6 +2103,13 @@ typedef union { #define MSR_IA32_MTRR_PHYSBASE9 0x00000212
/// @}
+#define MSR_IA32_MTRR_CACHE_UNCACHEABLE 0
+#define MSR_IA32_MTRR_CACHE_WRITE_COMBINING 1
+#define MSR_IA32_MTRR_CACHE_WRITE_THROUGH 4
+#define MSR_IA32_MTRR_CACHE_WRITE_PROTECTED 5
+#define MSR_IA32_MTRR_CACHE_WRITE_BACK 6
+#define MSR_IA32_MTRR_CACHE_INVALID_TYPE 7
+
/**
MSR information returned for MSR indexes #MSR_IA32_MTRR_PHYSBASE0 to
#MSR_IA32_MTRR_PHYSBASE9
|