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author | Andrei Warkentin <andrei.warkentin@intel.com> | 2023-02-17 18:43:08 -0600 |
---|---|---|
committer | mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> | 2023-03-08 18:10:34 +0000 |
commit | 5bd2e5dfe6f8efa2cbbf643e4e7e46867a8a26b0 (patch) | |
tree | 07b19495fa1e98bf49e74b843b0ccc57acf02754 | |
parent | dc5880d02f6507419c0381bb4e90fdafb4aaf751 (diff) | |
download | edk2-5bd2e5dfe6f8efa2cbbf643e4e7e46867a8a26b0.zip edk2-5bd2e5dfe6f8efa2cbbf643e4e7e46867a8a26b0.tar.gz edk2-5bd2e5dfe6f8efa2cbbf643e4e7e46867a8a26b0.tar.bz2 |
MdePkg: BaseLib: don't log in RISCV InternalSwitchStack
InternalSwitchStack may be called with a TPL high
enough for a DebugLib implementation to assert.
Other arch implementations don't log either.
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Andrei Warkentin <andrei.warkentin@intel.com>
-rw-r--r-- | MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c b/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c index cf646e4..b78424c 100644 --- a/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c +++ b/MdePkg/Library/BaseLib/RiscV64/InternalSwitchStack.c @@ -44,14 +44,6 @@ InternalSwitchStack ( {
BASE_LIBRARY_JUMP_BUFFER JumpBuffer;
- DEBUG ((
- DEBUG_INFO,
- "RISC-V InternalSwitchStack Entry:%x Context1:%x Context2:%x NewStack%x\n", \
- EntryPoint,
- Context1,
- Context2,
- NewStack
- ));
JumpBuffer.RA = (UINTN)EntryPoint;
JumpBuffer.SP = (UINTN)NewStack - sizeof (VOID *);
JumpBuffer.S0 = (UINT64)(UINTN)Context1;
|