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| author | Olivier Martin <olivier.martin@arm.com> | 2014-03-26 19:32:48 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-03-26 19:32:48 +0000 |
| commit | 47d183db53d91a669b4b080036434e30cea01e29 (patch) | |
| tree | 955d0bed77ac4612bfd829f9837ae1ac20c6b5a0 | |
| parent | 52d44f77c25a133d56871e7f42f9b4700ded6835 (diff) | |
| download | edk2-47d183db53d91a669b4b080036434e30cea01e29.zip edk2-47d183db53d91a669b4b080036434e30cea01e29.tar.gz edk2-47d183db53d91a669b4b080036434e30cea01e29.tar.bz2 | |
ArmPkg/ArmCortexA5x: Declared the helper functions to access the CPU Extended Control Register
This register is A5x specific. It is the reason why the code moved from ArmLib
to ArmCpuLib/ArmCortexA5xLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15397 6f19259b-4bc3-4df7-8a09-765794883524
5 files changed, 88 insertions, 14 deletions
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S new file mode 100644 index 0000000..e5fbc86 --- /dev/null +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S @@ -0,0 +1,32 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#include <AsmMacroIoLibV8.h>
+
+.text
+.align 3
+GCC_ASM_EXPORT (ArmReadCpuExCr)
+GCC_ASM_EXPORT (ArmWriteCpuExCr)
+
+ASM_PFX(ArmReadCpuExCr):
+ mrs x0, S3_1_c15_c2_1
+ ret
+
+ASM_PFX(ArmWriteCpuExCr):
+ msr S3_1_c15_c2_1, x0
+ dsb sy
+ isb
+ ret
+
+ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c index d13c7fd..890c9df 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.c @@ -48,3 +48,27 @@ ArmCpuSetupSmpNonSecure ( )
{
}
+
+VOID
+EFIAPI
+ArmSetCpuExCrBit (
+ IN UINT64 Bits
+ )
+{
+ UINT64 Value;
+ Value = ArmReadCpuExCr ();
+ Value |= Bits;
+ ArmWriteCpuExCr (Value);
+}
+
+VOID
+EFIAPI
+ArmUnsetCpuExCrBit (
+ IN UINT64 Bits
+ )
+{
+ UINT64 Value;
+ Value = ArmReadCpuExCr ();
+ Value &= ~Bits;
+ ArmWriteCpuExCr (Value);
+}
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf index 486aba7..acfa98d 100644 --- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf +++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/ArmCortexA5xLib.inf @@ -1,5 +1,5 @@ #/* @file
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2011-2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -31,5 +31,8 @@ [Sources.common]
ArmCortexA5xLib.c
+[Sources.AARCH64]
+ AArch64/ArmCortexA5xHelper.S | GCC
+
[FixedPcd]
gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz
diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h index e2217e3..ba3d519 100644 --- a/ArmPkg/Include/Chipset/ArmCortexA5x.h +++ b/ArmPkg/Include/Chipset/ArmCortexA5x.h @@ -1,6 +1,6 @@ /** @file
- Copyright (c) 2012-2013, ARM Limited. All rights reserved.
+ Copyright (c) 2012-2014, ARM Limited. All rights reserved.
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -20,4 +20,31 @@ //
#define A5X_FEATURE_SMP (1 << 6)
+//
+// Helper functions to access CPU Extended Control Register
+//
+UINT64
+EFIAPI
+ArmReadCpuExCr (
+ VOID
+ );
+
+VOID
+EFIAPI
+ArmWriteCpuExCr (
+ IN UINT64 Val
+ );
+
+VOID
+EFIAPI
+ArmSetCpuExCrBit (
+ IN UINT64 Bits
+ );
+
+VOID
+EFIAPI
+ArmUnsetCpuExCrBit (
+ IN UINT64 Bits
+ );
+
#endif
diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S index f169d02..28db98b 100644 --- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S @@ -37,8 +37,6 @@ GCC_ASM_EXPORT (ArmWriteScr) GCC_ASM_EXPORT (ArmWriteMVBar)
GCC_ASM_EXPORT (ArmCallWFE)
GCC_ASM_EXPORT (ArmCallSEV)
-GCC_ASM_EXPORT (ArmReadCpuExCr)
-GCC_ASM_EXPORT (ArmWriteCpuExCr)
GCC_ASM_EXPORT (ArmReadCpuActlr)
GCC_ASM_EXPORT (ArmWriteCpuActlr)
@@ -200,16 +198,6 @@ ASM_PFX(ArmCallSEV): sev
ret
-ASM_PFX(ArmReadCpuExCr):
- mrs x0, S3_1_c15_c2_1
- ret
-
-ASM_PFX(ArmWriteCpuExCr):
- msr S3_1_c15_c2_1, x0
- dsb sy
- isb
- ret
-
ASM_PFX(ArmReadCpuActlr):
mrs x0, S3_1_c15_c2_0
ret
|