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author | Hao Wu <hao.a.wu@intel.com> | 2018-08-27 16:51:45 +0800 |
---|---|---|
committer | Hao Wu <hao.a.wu@intel.com> | 2019-02-22 08:20:07 +0800 |
commit | 4104423ac067021ace59419f062dacce6e2cb525 (patch) | |
tree | 9b2ffc9b4e9934e9f6d950c72b07469da928f18e | |
parent | 112dcbd9c26800c6820020dfa02341fbb75439a7 (diff) | |
download | edk2-4104423ac067021ace59419f062dacce6e2cb525.zip edk2-4104423ac067021ace59419f062dacce6e2cb525.tar.gz edk2-4104423ac067021ace59419f062dacce6e2cb525.tar.bz2 |
MdeModulePkg/NvmExpressPei: Avoid updating the module-level variable
This commit is out of the scope for BZ-1409. The commit will remove the
call of RegisterForShadow() at the entry point of the driver. By doing so,
the driver is now possible to be executed without being re-loaded into
permanent memory.
Thus, this commit will update the NvmExpressPei driver to avoid updating
the content of a global variable.
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
-rw-r--r-- | MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c | 153 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c | 11 | ||||
-rw-r--r-- | MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h | 12 |
3 files changed, 92 insertions, 84 deletions
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c index 51b48d3..cb629c1 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/DmaMem.c @@ -1,7 +1,7 @@ /** @file
The DMA memory help function.
- Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -16,7 +16,33 @@ #include "NvmExpressPei.h"
-EDKII_IOMMU_PPI *mIoMmu;
+/**
+ Get IOMMU PPI.
+
+ @return Pointer to IOMMU PPI.
+
+**/
+EDKII_IOMMU_PPI *
+GetIoMmu (
+ VOID
+ )
+{
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
+
+ IoMmu = NULL;
+ Status = PeiServicesLocatePpi (
+ &gEdkiiIoMmuPpiGuid,
+ 0,
+ NULL,
+ (VOID **) &IoMmu
+ );
+ if (!EFI_ERROR (Status) && (IoMmu != NULL)) {
+ return IoMmu;
+ }
+
+ return NULL;
+}
/**
Provides the controller-specific addresses required to access system memory from a
@@ -46,18 +72,21 @@ IoMmuMap ( OUT VOID **Mapping
)
{
- EFI_STATUS Status;
- UINT64 Attribute;
-
- if (mIoMmu != NULL) {
- Status = mIoMmu->Map (
- mIoMmu,
- Operation,
- HostAddress,
- NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ EFI_STATUS Status;
+ UINT64 Attribute;
+ EDKII_IOMMU_PPI *IoMmu;
+
+ IoMmu = GetIoMmu ();
+
+ if (IoMmu != NULL) {
+ Status = IoMmu->Map (
+ IoMmu,
+ Operation,
+ HostAddress,
+ NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
@@ -78,11 +107,11 @@ IoMmuMap ( ASSERT(FALSE);
return EFI_INVALID_PARAMETER;
}
- Status = mIoMmu->SetAttribute (
- mIoMmu,
- *Mapping,
- Attribute
- );
+ Status = IoMmu->SetAttribute (
+ IoMmu,
+ *Mapping,
+ Attribute
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -108,11 +137,14 @@ IoMmuUnmap ( IN VOID *Mapping
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
+
+ IoMmu = GetIoMmu ();
- if (mIoMmu != NULL) {
- Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);
- Status = mIoMmu->Unmap (mIoMmu, Mapping);
+ if (IoMmu != NULL) {
+ Status = IoMmu->SetAttribute (IoMmu, Mapping, 0);
+ Status = IoMmu->Unmap (IoMmu, Mapping);
} else {
Status = EFI_SUCCESS;
}
@@ -148,39 +180,42 @@ IoMmuAllocateBuffer ( EFI_STATUS Status;
UINTN NumberOfBytes;
EFI_PHYSICAL_ADDRESS HostPhyAddress;
+ EDKII_IOMMU_PPI *IoMmu;
*HostAddress = NULL;
*DeviceAddress = 0;
- if (mIoMmu != NULL) {
- Status = mIoMmu->AllocateBuffer (
- mIoMmu,
- EfiBootServicesData,
- Pages,
- HostAddress,
- 0
- );
+ IoMmu = GetIoMmu ();
+
+ if (IoMmu != NULL) {
+ Status = IoMmu->AllocateBuffer (
+ IoMmu,
+ EfiBootServicesData,
+ Pages,
+ HostAddress,
+ 0
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);
- Status = mIoMmu->Map (
- mIoMmu,
- EdkiiIoMmuOperationBusMasterCommonBuffer,
- *HostAddress,
- &NumberOfBytes,
- DeviceAddress,
- Mapping
- );
+ Status = IoMmu->Map (
+ IoMmu,
+ EdkiiIoMmuOperationBusMasterCommonBuffer,
+ *HostAddress,
+ &NumberOfBytes,
+ DeviceAddress,
+ Mapping
+ );
if (EFI_ERROR (Status)) {
return EFI_OUT_OF_RESOURCES;
}
- Status = mIoMmu->SetAttribute (
- mIoMmu,
- *Mapping,
- EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE
- );
+ Status = IoMmu->SetAttribute (
+ IoMmu,
+ *Mapping,
+ EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE
+ );
if (EFI_ERROR (Status)) {
return Status;
}
@@ -219,31 +254,17 @@ IoMmuFreeBuffer ( IN VOID *Mapping
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
+ EDKII_IOMMU_PPI *IoMmu;
- if (mIoMmu != NULL) {
- Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);
- Status = mIoMmu->Unmap (mIoMmu, Mapping);
- Status = mIoMmu->FreeBuffer (mIoMmu, Pages, HostAddress);
+ IoMmu = GetIoMmu ();
+
+ if (IoMmu != NULL) {
+ Status = IoMmu->SetAttribute (IoMmu, Mapping, 0);
+ Status = IoMmu->Unmap (IoMmu, Mapping);
+ Status = IoMmu->FreeBuffer (IoMmu, Pages, HostAddress);
} else {
Status = EFI_SUCCESS;
}
return Status;
}
-
-/**
- Initialize IOMMU.
-**/
-VOID
-IoMmuInit (
- VOID
- )
-{
- PeiServicesLocatePpi (
- &gEdkiiIoMmuPpiGuid,
- 0,
- NULL,
- (VOID **)&mIoMmu
- );
-}
-
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c index fabec37..2fe73e9 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.c @@ -2,7 +2,7 @@ The NvmExpressPei driver is used to manage non-volatile memory subsystem
which follows NVM Express specification at PEI phase.
- Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -215,13 +215,6 @@ NvmExpressPeimEntry ( EFI_PHYSICAL_ADDRESS DeviceAddress;
//
- // Shadow this PEIM to run from memory
- //
- if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {
- return EFI_SUCCESS;
- }
-
- //
// Locate the NVME host controller PPI
//
Status = PeiServicesLocatePpi (
@@ -235,8 +228,6 @@ NvmExpressPeimEntry ( return EFI_UNSUPPORTED;
}
- IoMmuInit ();
-
Controller = 0;
MmioBase = 0;
while (TRUE) {
diff --git a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h index 0bd62c2..0135eca 100644 --- a/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h +++ b/MdeModulePkg/Bus/Pci/NvmExpressPei/NvmExpressPei.h @@ -2,7 +2,7 @@ The NvmExpressPei driver is used to manage non-volatile memory subsystem
which follows NVM Express specification at PEI phase.
- Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions
@@ -147,13 +147,9 @@ struct _PEI_NVME_CONTROLLER_PRIVATE_DATA { CR (a, PEI_NVME_CONTROLLER_PRIVATE_DATA, EndOfPeiNotifyList, NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE)
-/**
- Initialize IOMMU.
-**/
-VOID
-IoMmuInit (
- VOID
- );
+//
+// Internal functions
+//
/**
Allocates pages that are suitable for an OperationBusMasterCommonBuffer or
|