ArmPlatformPkg/PrePeiCore: Ensured the size is 8-byte aligned

Once divided by 2, the size should be 4-byte aligned to ensure the
stack pointer is 4-byte aligned.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13044 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 14 insertions, 6 deletions

diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index 75b8bb3..a98d560 100644
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -1,6 +1,6 @@
 /** @file

 *

-*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

 *

 *  This program and the accompanying materials

 *  are licensed and made available under the terms and conditions of the BSD License

@@ -124,6 +124,10 @@ PrimaryMain (
   TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;

   TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;

 

+  // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned

+  // to ensure the stack pointer is 4-byte aligned.

+  TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));

+

   //

   // Bind this information into the SEC hand-off state

   // Note: this must be in sync with the stuff in the asm file

@@ -136,8 +140,8 @@ PrimaryMain (
   SecCoreData.TemporaryRamSize       = TemporaryRamSize;

   SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;

   SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;

-  SecCoreData.StackBase              = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize/2));

-  SecCoreData.StackSize              = SecCoreData.TemporaryRamSize / 2;

+  SecCoreData.StackBase              = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4);

+  SecCoreData.StackSize              = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase;

 

   // Jump to PEI core entry point

   (PeiCoreEntryPoint)(&SecCoreData, PpiList);

diff --git a/ArmPlatformPkg/PrePeiCore/MainUniCore.c b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
index 65682b1..b437ad6 100644
--- a/ArmPlatformPkg/PrePeiCore/MainUniCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainUniCore.c
@@ -1,6 +1,6 @@
 /** @file

 *

-*  Copyright (c) 2011, ARM Limited. All rights reserved.

+*  Copyright (c) 2011-2012, ARM Limited. All rights reserved.

 *

 *  This program and the accompanying materials

 *  are licensed and made available under the terms and conditions of the BSD License

@@ -43,6 +43,10 @@ PrimaryMain (
   TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;

   TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;

 

+  // Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned

+  // to ensure the stack pointer is 4-byte aligned.

+  TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));

+

   //

   // Bind this information into the SEC hand-off state

   // Note: this must be in sync with the stuff in the asm file

@@ -55,8 +59,8 @@ PrimaryMain (
   SecCoreData.TemporaryRamSize       = TemporaryRamSize;

   SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;

   SecCoreData.PeiTemporaryRamSize    = SecCoreData.TemporaryRamSize / 2;

-  SecCoreData.StackBase              = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize/2));

-  SecCoreData.StackSize              = SecCoreData.TemporaryRamSize / 2;

+  SecCoreData.StackBase              = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4);

+  SecCoreData.StackSize              = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase;

 

   // Jump to PEI core entry point

   (PeiCoreEntryPoint)(&SecCoreData, PpiList);