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authorPete Batard <pete@akeo.ie>2018-01-12 21:33:28 +0800
committerLiming Gao <liming.gao@intel.com>2018-02-07 09:49:21 +0800
commit30939ff2bc43f9cadb098025836f630e1d577147 (patch)
tree6d8739d2257f6dc6b1075c5aef0b4c9431d58e30
parent751053d6f169cdca91891e84202b63aedd4386b0 (diff)
downloadedk2-30939ff2bc43f9cadb098025836f630e1d577147.zip
edk2-30939ff2bc43f9cadb098025836f630e1d577147.tar.gz
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MdePkg/Library/BaseLib: Enable VS2017/ARM builds
Most of the RVCT assembly can be reused as is for MSFT except for CpuBreakpoint.asm, which we need to force to Arm mode. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Pete Batard <pete@akeo.ie> Reviewed-by: Liming Gao <liming.gao@intel.com>
-rw-r--r--MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm5
-rw-r--r--MdePkg/Library/BaseLib/BaseLib.inf16
2 files changed, 17 insertions, 4 deletions
diff --git a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
index 8a80651..e7490b0 100644
--- a/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
+++ b/MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
@@ -16,7 +16,10 @@
EXPORT CpuBreakpoint
- AREA Cpu_Breakpoint, CODE, READONLY
+; Force ARM mode for this section, as MSFT assembler defaults to THUMB
+ AREA Cpu_Breakpoint, CODE, READONLY, ARM
+
+ ARM
;/**
; Generates a breakpoint on the CPU.
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index fbfb006..3c07e6b 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -824,8 +824,9 @@
[Sources.ARM]
Arm/InternalSwitchStack.c
Arm/Unaligned.c
- Math64.c | RVCT
-
+ Math64.c | RVCT
+ Math64.c | MSFT
+
Arm/SwitchStack.asm | RVCT
Arm/SetJumpLongJump.asm | RVCT
Arm/DisableInterrupts.asm | RVCT
@@ -834,7 +835,16 @@
Arm/CpuPause.asm | RVCT
Arm/CpuBreakpoint.asm | RVCT
Arm/MemoryFence.asm | RVCT
-
+
+ Arm/SwitchStack.asm | MSFT
+ Arm/SetJumpLongJump.asm | MSFT
+ Arm/DisableInterrupts.asm | MSFT
+ Arm/EnableInterrupts.asm | MSFT
+ Arm/GetInterruptsState.asm | MSFT
+ Arm/CpuPause.asm | MSFT
+ Arm/CpuBreakpoint.asm | MSFT
+ Arm/MemoryFence.asm | MSFT
+
Arm/Math64.S | GCC
Arm/SwitchStack.S | GCC
Arm/EnableInterrupts.S | GCC