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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2015-09-24 19:35:10 +0000 |
|---|---|---|
| committer | abiesheuvel <abiesheuvel@Edk2> | 2015-09-24 19:35:10 +0000 |
| commit | 0c960e86c22c46c002b257c4ba3500d1fba03c26 (patch) | |
| tree | 16b2cacb91704521c7abd338b366946069b76d4e | |
| parent | 36c64c664ba18026aad5375dbb80118bd3141266 (diff) | |
| download | edk2-0c960e86c22c46c002b257c4ba3500d1fba03c26.zip edk2-0c960e86c22c46c002b257c4ba3500d1fba03c26.tar.gz edk2-0c960e86c22c46c002b257c4ba3500d1fba03c26.tar.bz2 | |
BaseTools/GenFw: remove ARM and RVCT references from ELF64 code
ARM and RVCT apply to 32-bit code only, so remove any references
to them (including the workaround for the linker) from the 64-bit
version of ElfConvert.c
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18539 6f19259b-4bc3-4df7-8a09-765794883524
| -rw-r--r-- | BaseTools/Source/C/GenFw/Elf64Convert.c | 29 |
1 files changed, 7 insertions, 22 deletions
diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c index a3f1f5d..90d80a2 100644 --- a/BaseTools/Source/C/GenFw/Elf64Convert.c +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c @@ -334,12 +334,8 @@ ScanSections64 ( if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
- } else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
- // ARM RVCT tools have behavior outside of the ELF specification to try
- // and make images smaller. If sh_addr is not aligned to sh_addralign
- // then the section needs to preserve sh_addr MOD sh_addralign.
- // Normally doing nothing here works great.
- Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
+ } else {
+ Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");
}
}
@@ -369,10 +365,7 @@ ScanSections64 ( }
mDebugOffset = DebugRvaAlign(mCoffOffset);
-
- if (mEhdr->e_machine != EM_ARM) {
- mCoffOffset = CoffAlign(mCoffOffset);
- }
+ mCoffOffset = CoffAlign(mCoffOffset);
if (SectionCount > 1 && mOutImageType == FW_EFI_IMAGE) {
Warning (NULL, 0, 0, NULL, "Mulitple sections in %s are merged into 1 text section. Source level debug might not work correctly.", mInImageName);
@@ -392,12 +385,8 @@ ScanSections64 ( if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
- } else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
- // ARM RVCT tools have behavior outside of the ELF specification to try
- // and make images smaller. If sh_addr is not aligned to sh_addralign
- // then the section needs to preserve sh_addr MOD sh_addralign.
- // Normally doing nothing here works great.
- Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
+ } else {
+ Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");
}
}
@@ -448,12 +437,8 @@ ScanSections64 ( if ((shdr->sh_addr & (shdr->sh_addralign - 1)) == 0) {
// if the section address is aligned we must align PE/COFF
mCoffOffset = (UINT32) ((mCoffOffset + shdr->sh_addralign - 1) & ~(shdr->sh_addralign - 1));
- } else if ((shdr->sh_addr % shdr->sh_addralign) != (mCoffOffset % shdr->sh_addralign)) {
- // ARM RVCT tools have behavior outside of the ELF specification to try
- // and make images smaller. If sh_addr is not aligned to sh_addralign
- // then the section needs to preserve sh_addr MOD sh_addralign.
- // Normally doing nothing here works great.
- Error (NULL, 0, 3000, "Invalid", "Unsupported section alignment.");
+ } else {
+ Error (NULL, 0, 3000, "Invalid", "Section address not aligned to its own alignment.");
}
}
if (shdr->sh_size != 0) {
|