blob: 551c8afdf4bef10ebbc2564dacab76a957ff840b (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
|
/*
* ASPEED SDRAM Memory Controller
*
* Copyright (C) 2016 IBM Corp.
*
* This code is licensed under the GPL version 2 or later. See the
* COPYING file in the top-level directory.
*/
#ifndef ASPEED_SDMC_H
#define ASPEED_SDMC_H
#include "hw/sysbus.h"
#define TYPE_ASPEED_SDMC "aspeed.sdmc"
#define ASPEED_SDMC(obj) OBJECT_CHECK(AspeedSDMCState, (obj), TYPE_ASPEED_SDMC)
#define ASPEED_SDMC_NR_REGS (0x8 >> 2)
typedef struct AspeedSDMCState {
/*< private >*/
SysBusDevice parent_obj;
/*< public >*/
MemoryRegion iomem;
uint32_t regs[ASPEED_SDMC_NR_REGS];
uint32_t silicon_rev;
uint32_t ram_bits;
uint64_t ram_size;
} AspeedSDMCState;
#endif /* ASPEED_SDMC_H */
|