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8 daystests/tcg: reduce the number of plugin tests combinationsAlex Bennée3-12/+30
As our set of multiarch tests has grown the practice of running every plugin with every test is becoming unsustainable. If we switch to ensuring every test gets run with at least one plugin we can speed things up. Some plugins do need to be run with specific tests (for example the memory instrumentation test). We can handle this by manually adding them to EXTRA_RUNS. We also need to wrap rules in a CONFIG_PLUGIN test so we don't enable the runs when plugins are not enabled. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-12-alex.bennee@linaro.org>
8 daystests/tcg: don't include multiarch tests if not supportedAlex Bennée2-0/+11
We are about to change the way the plugin runs are done and having this included by default will complicate things. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-10-alex.bennee@linaro.org>
8 daystests/tcg: remove ADDITIONAL_PLUGINS_TESTSAlex Bennée1-2/+1
We never actually used this is the end. Remove it to enable re-factoring. Fixes: 7cefff22d54 (tests/tcg: add mechanism to run specific tests with plugins) Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-9-alex.bennee@linaro.org>
8 daystests/tcg: skip libsyscall.so on softmmu testsAlex Bennée1-0/+6
It isn't testing anything and just expanding the runtime of testing. Reviewed-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250725154517.3523095-8-alex.bennee@linaro.org>
2025-07-16Merge tag 'mips-20250715' of https://github.com/philmd/qemu into stagingStefan Hajnoczi10-0/+1208
MIPS patches queue - Implement CRC32[c] (Release 6) instructions - Convert Octeon LX instructions to decodetree - Restrict ITU to TCG - Fix ESP issue affecting WinNT (INACCESSIBLE_BOOT_DEVICE BSOD) - Add missing FDT dependency for some MicroBlaze machines - Remove execute bit on hppa-firmware blobs # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmh18qYACgkQ4+MsLN6t # wN6BKBAAnGgPvk1/8Pi0SJG9Swr60JE6VodL+89xgVglopcYAxN0hpcpq+W2ywgK # uaOWNzfsyZZY7Zst35nLJKZrRjV6pXqOPqxLNIsJ8GHiVOXPUQTJIkBjgLs1b9kc # +tR85U/JKTExP16FXQWzbSTqCOYsVoNtm6boYVjzno8BGv2C2ymDNr7a8oN9FWsS # It/+5SpxwosmYf7jdbCRAwP/TRTFDGtV1JTjaEuZ19qj024hcBDTQ4qdQu7iIXF9 # eI7a9trIoGGUF7644z+XkYbSd2dghKqOaPmKDDSnW+pva26NpoG2EI4C9pkcvfrh # 4hvpAiwNbZ7erChIi5vlZsw84fUCptMVaoZWk+mu3Rif440FM02OA51dgUN3DCMV # jddW5CzRcYlKxU//uMVdnmIY7T+KSEJJXUKOXa6vh623PdD4I14H9vrcP5t6lavE # 2G16+OJHMB0pQkDFgwiz4f1nglIxO4ujMP0Ow5wRDarCCI/4BWkMDAuWWAv05tXH # zKsfHi5RSL2UtbNr0yd1e6Ph9ofm99RYOMGl0G8vyWbR4hVIAhfF8+qq0EfH9JCk # t7vIigoU5FbP4JNaxJoNIIigFpyedC2nUPHYkeM4A2e5xW5oC/KGsp4XzzyfmJ3Y # wpWAYFyB/7qAk8MfeAH6DTJ5s1Sz7xY0K0CrjIPnhCoLpXURwpA= # =bhsu # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Jul 2025 02:18:14 EDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'mips-20250715' of https://github.com/philmd/qemu: esp.c: only allow ESP commands permitted in the current asc_mode esp.c: add asc_mode property to indicate the current ESP mode esp.c: only call dma_memory_write function if transfer length is non-zero esp.c: only call dma_memory_read function if transfer length is non-zero esp.h: remove separate ESPState typedef esp.c: improve comment in esp_transfer_data() esp.c: only raise IRQ in esp_transfer_data() for CMD_SEL, CMD_SELATN and CMD_TI commands hw/microblaze: Add missing FDT dependency hw/intc/loongarch_extioi: Remove unnecessary 'qemu/typedefs.h' include hw/mips: Restrict ITU to TCG roms: re-remove execute bit from hppa-firmware* tests/tcg/mips: Add tests for MIPS CRC32[c] instructions target/mips: Have gen_[d]lsa() callers add 1 to shift amount argument target/mips: Convert Octeon LX instructions to decodetree target/mips: Extract generic gen_lx() helper target/mips: Extract gen_base_index_addr() helper target/mips: Add support for emulation of CRC32 instructions Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-07-15qemu: Declare all load/store helper in 'qemu/bswap.h'Philippe Mathieu-Daudé1-0/+1
Restrict "exec/tswap.h" to the tswap*() methods, move the load/store helpers with the other ones declared in "qemu/bswap.h". Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20250708215320.70426-8-philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2025-07-15tests/tcg/mips: Add tests for MIPS CRC32[c] instructionsAleksandar Rakic10-0/+1208
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com> Reviewed-by: Aleksandar Rikalo <arikalo@gmail.com> Message-ID: <20250214173702.2308488-3-aleksandar.rakic@htecgroup.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-07-10fpu: Process float_muladd_negate_result after roundingRichard Henderson2-0/+38
Changing the sign before rounding affects the correctness of the asymmetric rouding modes: float_round_up and float_round_down. Reported-by: WANG Rui <wangrui@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2025-07-04tests/tcg/riscv64: Add test for MEPC bit maskingCharalampos Mitrodimas2-0/+77
Add a regression test to verify that MEPC properly masks the lower bits when an address with mode bits is written to it, as required by the RISC-V Privileged Architecture specification. The test sets STVEC to an address with bit 0 set (vectored mode), triggers an illegal instruction exception, copies STVEC to MEPC in the trap handler, and verifies that MEPC masks bits [1:0] correctly for IALIGN=32. Without the fix, MEPC retains the mode bits (returns non-zero/FAIL). With the fix, MEPC clears bits [1:0] (returns 0/PASS). Signed-off-by: Charalampos Mitrodimas <charmitro@posteo.net> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250703182157.281320-3-charmitro@posteo.net> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2025-07-02plugins: Add patcher plugin and testRowan Hart6-2/+328
This patch adds a plugin that exercises the virtual and hardware memory read-write API functions added in a previous patch. The plugin takes a target and patch byte sequence, and will overwrite any instruction matching the target byte sequence with the patch. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Rowan Hart <rowanbhart@gmail.com> Message-ID: <20250624175351.440780-8-rowanbhart@gmail.com> [AJB: tweak Makefile, use uintptr_t for pointer stuffing] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250627112512.1880708-12-alex.bennee@linaro.org>
2025-07-02tests/tcg: Remove copy-pasted notes and from i386 and add x86_64 system ↵Rowan Hart1-7/+5
tests to tests The x86_64-softmmu Makefile seems to have been copy-pasted from the i386 Makefile at some point in the past. Cleaning up a vestigial unused variable and removing some outdated comments. Signed-off-by: Rowan Hart <rowanbhart@gmail.com> Message-ID: <20250624175351.440780-7-rowanbhart@gmail.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250627112512.1880708-11-alex.bennee@linaro.org>
2025-06-16meson: fix Windows buildoltolm1-1/+1
The build fails on Windows. Replace calls to Unix programs like ´cat´, ´sed´ and ´true´ with calls to ´python´ and wrap calls to ´os.path.relpath´ in try-except because it can fail when the two paths are on different drives. Make sure to convert the Windows paths to Unix paths to prevent warnings in generated files. Signed-off-by: oltolm <oleg.tolmatcev@gmail.com> Message-id: 20250612221521.1109-2-oleg.tolmatcev@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-06-07tests/tcg: make aarch64 boot.S handle different starting modesAlex Bennée2-6/+169
Currently the boot.S code assumes everything starts at EL1. This will break things like the memory test which will barf on unaligned memory access when run at a higher level. Adapt the boot code to do some basic verification of the starting mode and the minimal configuration to move to the lower exception levels. With this we can run the memory test with: -M virt,secure=on -M virt,secure=on,virtualization=on -M virt,virtualisation=on If a test needs to be at a particular EL it can use the semihosting command line to indicate the level we should execute in. Cc: Julian Armistead <julian.armistead@linaro.org> Cc: Jim MacArthur <jim.macarthur@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250603110204.838117-4-alex.bennee@linaro.org>
2025-06-06tests/tcg/x86_64/fma: add test for exact-denormal outputPeter Maydell1-0/+12
Add some fma test cases that check for correct handling of FTZ and for the flag that indicates that the input denormal was consumed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250519145114.2786534-5-peter.maydell@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-06-06target/i386: Detect flush-to-zero after roundingPeter Maydell1-5/+0
The Intel SDM section 10.2.3.3 on the MXCSR.FTZ bit says that we flush outputs to zero when we detect underflow, which is after rounding. Set the detect_ftz flag accordingly. This allows us to enable the test in fma.c which checks this behaviour. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250519145114.2786534-2-peter.maydell@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-06hw/loongarch/virt: Get physical entry address with elf fileBibo Mao1-1/+1
With load_elf() api, image load low address and high address is converted to physical address if parameter translate_fn is provided. However executing entry address is still virtual address. Here convert entry address into physical address, since MMU is disabled when system power on, the first PC instruction should be physical address. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Song Gao <gaosong@loongson.cn>
2025-04-25contrib/plugins: Fix type conflict of GLib function pointersKohei Tokunaga2-4/+4
On Emscripten, function pointer casts can result in runtime failures due to strict function signature checks. This affects the use of g_list_sort and g_slist_sort, which internally perform function pointer casts that are not supported by Emscripten. To avoid these issues, g_list_sort_with_data and g_slist_sort_with_data should be used instead, as they do not rely on function pointer casting. Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <0fcddfca16ca8da2bdaa7b2c114476f5b73d032b.1745295397.git.ktokunaga.mail@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2025-04-09tests/tcg/plugins: add plugin to test reset and uninstallPierrick Bouvier2-1/+74
We perform a plugin reset, uninstall, and make sure we went through those steps. Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20250404032027.430575-3-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2025-04-09tests/tcg: fix semihosting SYS_EXIT for aarch64 in boot.SAlex Bennée1-3/+2
We don't expect to hit exceptions in our testing so currently all the vectors report an un-expected exception and then attempt to exit. However for aarch64 we should always use the extended information block as we do in _exit. Rather than duplicate the code on the error handler just branch to the _exit handler with a failing status code. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250404115641.258048-1-alex.bennee@linaro.org>
2025-03-10plugins/api: use qemu_target_page_mask() to get valueAlex Bennée2-2/+2
Requiring TARGET_PAGE_MASK to be defined gets in the way of building this unit once. qemu_target_page_mask() will tell us what it is. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-21-alex.bennee@linaro.org>
2025-03-10tests/tcg: Suppress compiler false-positive warning on sha1.cPeter Maydell4-3/+13
GCC versions at least 12 through 15 incorrectly report a warning about code in sha1.c: tests/tcg/multiarch/sha1.c:161:13: warning: ‘SHA1Transform’ reading 64 bytes from a region of size 0 [-Wstringop-overread] 161 | SHA1Transform(context->state, &data[i]); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This is a piece of stock library code for doing SHA1 which we've simply copied, rather than writing ourselves. The bug has been reported to upstream GCC (about a different library's use of this code): https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106709 For our test case, since this isn't our original code and there isn't actually a bug in it, suppress the incorrect warning rather than trying to modify the code to work around the compiler issue. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2328 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250227141343.1675415-1-peter.maydell@linaro.org> [AJB: -Wno-unknown-warning-option for clang's sake] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-18-alex.bennee@linaro.org>
2025-03-10tests/tcg: enable -fwrapv for test-i386-bmiAlex Bennée1-1/+1
We allow things like: tests/tcg/i386/test-i386-bmi2.c:124:35: warning: shifting a negative signed value is undefined [-Wshift-negative-value] assert(result == (mask & ~(-1 << 30))); in the main code, so allow it for the test. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-17-alex.bennee@linaro.org>
2025-03-10tests/tcg: fix constraints in test-i386-adcoxAlex Bennée1-3/+3
Clang complains: clang -O2 -m64 -mcx16 /home/alex/lsrc/qemu.git/tests/tcg/i386/test-i386-adcox.c -o test-i386-adcox -static /home/alex/lsrc/qemu.git/tests/tcg/i386/test-i386-adcox.c:32:26: error: invalid input constraint '0' in asm : "r" ((REG)-1), "0" (flags), "1" (out_adcx), "2" (out_adox)); ^ /home/alex/lsrc/qemu.git/tests/tcg/i386/test-i386-adcox.c:57:26: error: invalid input constraint '0' in asm : "r" ((REG)-1), "0" (flags), "1" (out_adcx), "2" (out_adox)); ^ 2 errors generated. Pointing out a numbered input constraint can't point to a read/write output [1]. Convert to a read-only input constraint to allow this. [1] https://lists.llvm.org/pipermail/cfe-commits/Week-of-Mon-20101101/036036.html Suggested-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-16-alex.bennee@linaro.org>
2025-03-10tests/tcg: add message to _Static_assert in test-avxAlex Bennée1-1/+1
In preparation for enabling clang and avoiding: error: '_Static_assert' with no message is a C2x extension [-Werror,-Wc2x-extensions] let us just add the message to silence the warning. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-15-alex.bennee@linaro.org>
2025-03-10tests/tcg: mark test-vma as a linux-only testAlex Bennée1-0/+0
The main multiarch tests should compile for any POSIX system, however test-vma's usage of MAP_NORESERVE makes it a linux-only test. Simply moving the source file is enough for the build logic to skip on BSD's. Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-14-alex.bennee@linaro.org>
2025-03-10plugins: add explicit dependency in functional testsPierrick Bouvier1-0/+2
./tests/functional/test_aarch64_tcg_plugins.py needs to have plugin libinsn built. However, it's not listed as a dependency, so meson can't know it needs to be built. Thus, we keep track of all plugins, and add them as an explicit dependency. Fixes: 4c134d07b9e ("tests: add a new set of tests to exercise plugins") Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250304222439.2035603-9-alex.bennee@linaro.org>
2025-02-10Merge tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of ↵Stefan Hajnoczi3-1/+77
https://gitlab.com/stsquad/qemu into staging testing and gdbstub updates: - add a check-rust test to docker builds - re-factor the qtest logic to be cleaner - fix tests to not clock_step when no timers enabled - roll-up log prefix into qtest_send - cleaner error reporting when qtest_clock_set fails - revert old deadlock fix now tests are updated - only run full set of migration tests under HW acceleration - support late attachment to user-mode gdbstubs # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmeqBSsACgkQ+9DbCVqe # KkQS/Af+K0hpdGc1msiuMsqmuESBvhoQniYZFLN1/pwe2KpG8i/+fq2fsCuxJhJ1 # 2TzPH7aj54p9MGCZf2k9JLhO22XldN+oezZMc1crhoWK0AtrWhnLs58I2oEPIsUo # NmGO6Zfm98ge89o2y8GCvd0QXAtUf+jduDKnW0mfnOnw+w/mky5KzWS7/1091VGW # 42LSY4KnqgdLSqLyuLBOrgADEjB1ChWS4/bSC+kEYSGrmNQB+n1KeIzzlJBGpOr0 # Z9yzmhMCm7TWdkFNPmnVfYH/7ZUNcpv6PtQSpkku4f6b/gybyvJBknHpM4i+Gpb5 # 87wSjljrCpdNm/9KFRjiJuUWdS/jCg== # =UF0n # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 08:54:51 EST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-10.0-testing-and-gdstub-updates-100225-1' of https://gitlab.com/stsquad/qemu: tests/tcg: Add late gdbstub attach test docs/user: Document the %d placeholder and suspend=n QEMU_GDB features gdbstub: Allow late attachment osdep: Introduce qemu_kill_thread() user: Introduce host_interrupt_signal user: Introduce user/signal.h gdbstub: Try unlinking the unix socket before binding gdbstub: Allow the %d placeholder in the socket path tests/qtest/migration: Pick smoke tests tests/qtest/migration: Add --full option Revert "util/timer: avoid deadlock when shutting down" tests/qtest: tighten up the checks on clock_step tests/qtest: rename qtest_send_prefix and roll-up into qtest_send tests/qtest: simplify qtest_process_inbuf tests/qtest: don't step clock at start of npcm7xx periodic IRQ test tests/qtest: don't attempt to clock_step while waiting for virtio ISR tests/docker: replicate the check-rust-tools-nightly CI job Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10Merge tag 'pull-target-arm-20250210' of ↵Stefan Hajnoczi3-61/+0
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Deprecate pxa2xx CPUs, iwMMXt emulation, -old-param option * Drop unused AArch64DecodeTable typedefs * Minor code cleanups * hw/net/cadence_gem: Fix the mask/compare/disable-mask logic * linux-user: Do not define struct sched_attr if libc headers do # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmeqH/sZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lW6D/4r4SyxAzrjIQRLh3xydADN # A9EsQ44Or/M7jJ7uzR5nkLldlHdKTccVZFj17BlK6DnklsTUVSUoxpHtzYTHE2Ar # Q8iqV4dqoyDrYpqHWNQQvwQCBLbcj0CFQ1VjieG656m4uhImoeVMiH3xbFvMwqj0 # KpIWL/+jaRs5jgpnN7Ig4Zq3gVHVZWyOOjzIKF/l4hFchK4eao0oAWdWo/TtGPHB # WyqkO1YZoZGBlT/7WXyKE5YXoXbd8m079NXcHmH6sy1/fSNXQ7qIlHGV/36kiJo1 # WnDgZ0KUOEl4thaeq731xtgGcwt9C9Qx8g9bJP42os7EzQZBtvXxJXWgQKpvpNVH # Hmpsj0ed7oI1LH5DEPkqvYOEnnvEFt3skMbblhIZufnrAnojk9Q64v/Z1LNEIuuC # j5sZrFZsKPsA2uNzsmqXyJxWwnU6IT5YNBZAzALFTwE8dNL/VMXfRYhhUEy0Ay3C # jVXHk+sfOKo83YNswffagBeb/tRFDApgvRySxxL9TCONGl0HNkXqSuE+hssF8jyr # AnZ3zxSrmWKZizuotvFwaP0bxP0Sa/yeR1lR6E1xu+iEEJKJ4dE5xpX4E3uf6tHk # cfQQXFrhOzEwGn4qLDuqcgvhxRecZL7kNiFYidynKafIBw///J1cpaDYxxwh9v6O # TZuJliw0uCo6z0sXxVIn1w== # =MS2g # -----END PGP SIGNATURE----- # gpg: Signature made Mon 10 Feb 2025 10:49:15 EST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20250210' of https://git.linaro.org/people/pmaydell/qemu-arm: linux-user: Do not define struct sched_attr if libc headers do qemu-options: Deprecate -old-param command line option hw/net/cadence_gem: Fix the mask/compare/disable-mask logic hw/cpu/arm: Declare CPU QOM types using DEFINE_TYPES() macro hw/cpu/arm: Alias 'num-cpu' property on TYPE_REALVIEW_MPCORE hw/arm/fsl-imx7: Add local 'mpcore/gic' variables hw/arm/fsl-imx6ul: Add local 'mpcore/gic' variables hw/arm/fsl-imx6: Add local 'mpcore/gic' variables hw/arm/boot: Propagate vCPU to arm_load_dtb() target/arm: Drop unused AArch64DecodeTable typedefs tests/tcg/arm: Remove test-arm-iwmmxt test target/arm: deprecate the pxa2xx CPUs and iwMMXt emulation Conflicts: - The iwMMXt deprecation notice conflicted with the 32-bit host operating system deprecation notice. Add both notices. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-02-10tests/tcg: Add late gdbstub attach testIlya Leoshkevich3-1/+77
Add a small test to prevent regressions. Make sure that host_interrupt_signal is not visible to the guest. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20250117001542.8290-9-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250207153112.3939799-18-alex.bennee@linaro.org>
2025-02-07tests/tcg/arm: Remove test-arm-iwmmxt testPeter Maydell3-61/+0
The test-arm-iwmmmxt test isn't testing what it thinks it's testing. If you run it with a CPU type that supports iwMMXt then it will crash immediately with a SIGILL, because (even with -marm) GCC will link it against startup code that is in Thumb mode, and no iwMMXt CPU has Thumb: 00010338 <_start>: 10338: f04f 0b00 mov.w fp, #0 1033c: f04f 0e00 mov.w lr, #0 If you run it with a CPU type which does *not* support iwMMXt, which is what 'make check-tcg' does, then QEMU will not try to handle the insns as iwMMXt. Instead the translator turns them into illegal instructions. Then in the linux-user cpu_loop() code we identify them as FPA11 instructions inside emulate_arm_fpa11(), because the FPA11 happened to use the same coprocessor number as these iwMMXt insns. So we execute a completely different set of FPA11 insns, which means we don't crash, but we will print garbage to stdout. Then the test binary always exits with a 0 return code, so 'make check-tcg' thinks the test passes. Modern gnueabihf toolchains assume in their startup code that the CPU is not so old as to not support Thumb, so there's no way to get them to generate a binary that actually does what the test wants. Since we're deprecating iwMMXt emulation anyway, it's not worth trying to salvage the test case to get it to really test the iwMMXt insns. Delete the test entirely. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20250127112715.2936555-3-peter.maydell@linaro.org
2025-02-07tests/tcg/x86_64/fma: Test some x86 fused-multiply-add casesPeter Maydell2-0/+110
Add a test case which tests some corner case behaviour of fused-multiply-add on x86: * 0 * Inf + SNaN should raise Invalid * 0 * Inf + QNaN shouldh not raise Invalid * tininess should be detected after rounding There is also one currently-disabled test case: * flush-to-zero should be done after rounding This is disabled because QEMU's emulation currently does this incorrectly (and so would fail the test). The test case is kept in but disabled, as the justification for why the test running harness has support for testing both with and without FTZ set. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Link: https://lore.kernel.org/r/20250116112536.4117889-3-peter.maydell@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-01-30tests/tcg/s390x: Test modifying code using the MVC instructionIlya Leoshkevich2-0/+83
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20250128001338.11474-2-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2025-01-17plugins: enable linking with clang/lldPierrick Bouvier1-2/+1
Windows uses a special mechanism to enable plugins to work (DLL delay loading). Option for lld is different than ld. MSYS2 clang based environment use lld by default, so restricting to this config on Windows is safe, and will avoid false bug reports. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Tested-by: Stefan Weil <sw@weilnetz.de> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20250110203401.178532-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-26-alex.bennee@linaro.org>
2025-01-17tests/tcg/plugins/mem: fix 32-bit buildPierrick Bouvier1-3/+3
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241217224306.2900490-5-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-15-alex.bennee@linaro.org>
2025-01-17tests/tcg/plugins/syscall: fix 32-bit buildPierrick Bouvier1-3/+3
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241217224306.2900490-4-pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-14-alex.bennee@linaro.org>
2025-01-17tests/tcg/plugins/insn: remove unused callback parameterPierrick Bouvier1-3/+1
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20250116160306.1709518-12-alex.bennee@linaro.org>
2025-01-13tests/tcg/aarch64: force qarma5 for pauth-3 testPeter Maydell1-0/+3
The pauth-3 test explicitly tests that a computation of the pointer-authentication produces the expected result. This means that it must be run with the QARMA5 algorithm. Explicitly set the pauth algorithm when running this test, so that it doesn't break when we change the default algorithm the 'max' CPU uses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-01-07tests/tcg/s390x: Use the SLOF libc headers for the multiarch testsIlya Leoshkevich1-1/+2
Compiling the s390x tests on Fedora, which has the s390x cross-compiler installed, fails with: In file included from qemu/tests/tcg/s390x/console.c:8: qemu/tests/tcg/s390x/../../../pc-bios/s390-ccw/sclp.c:11:10: fatal error: string.h: No such file or directory 11 | #include <string.h> This is because Fedora does not have a cross-libc. Since console.c already uses the SLOF libc implementation, add the respective headers to the include path. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241216133819.78583-1-iii@linux.ibm.com> Tested-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-12-24tests/tcg: Do not use inttypes.h in multiarch/system/memory.cIlya Leoshkevich1-5/+4
make check-tcg fails on Fedora with the following error message: alpha-linux-gnu-gcc [...] qemu/tests/tcg/multiarch/system/memory.c -o memory [...] qemu/tests/tcg/multiarch/system/memory.c:17:10: fatal error: inttypes.h: No such file or directory 17 | #include <inttypes.h> | ^~~~~~~~~~~~ compilation terminated. The reason is that Fedora has cross-compilers, but no cross-glibc headers. Fix by hardcoding the format specifiers and dropping the include. An alternative fix would be to introduce a configure check for inttypes.h. But this would make it impossible to use Fedora cross-compilers for softmmu tests, which used to work so far. Fixes: ecbcc9ead2f8 ("tests/tcg: add a system test to check memory instrumentation") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-ID: <20241010085906.226249-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-12-17tests/tcg/aarch64: add system test for FEAT_XSManos Pitsidianakis1-0/+27
Add system test to make sure FEAT_XS is enabled for max cpu emulation and that QEMU doesn't crash when encountering an NXS instruction variant. Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241211144440.2700268-7-peter.maydell@linaro.org [PMM: In ISAR field test, mask with 0xf, not 0xff; use < rather than an equality test to follow the standard ID register field check guidelines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-19Merge tag 'pull-9.2-rc-updates-181124-1' of https://gitlab.com/stsquad/qemu ↵Peter Maydell3-6/+6
into staging Misc fixes for 9.2 - fix remaining gdbstub test cases to exit cleanly - update MAINTAINERS with qemu-rust mailing list details - re-factor virtio-gpu and fix coverity warnings # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmc7aQwACgkQ+9DbCVqe # KkQufwf/XN5dcHxddhUHCLQUNA/5STiO5P10vHOGpknqwT/ZKADAbY8gQsoJovSp # qxczZPFpHlnGkf+AV3wrj2IcFUWlvlhgTw5njsMTOSSjK0jtI2MZrNn2v+6hmelg # y8ACB+LHkj34Ood9y5H6augCiKsMC7ad2mpXEMQgcZzpp4KlAutu8nbsYpYlAF40 # 1d2Wdtkrt++jPHQGgp0pPqAxq5WyvR3uSdidUFGfmpAqkCRs0ExosqEgj/ODzdHF # WrvLy9ISdCjZk+5XOxfadmz1vJ31QcZ6pcmkZRXJAJR4p7EST5BTfS10IBNIipgs # C25TuT+IH9+It0n/Sohf3NlxTnbTDw== # =TYAI # -----END PGP SIGNATURE----- # gpg: Signature made Mon 18 Nov 2024 16:19:24 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-9.2-rc-updates-181124-1' of https://gitlab.com/stsquad/qemu: hw/display: check frame buffer can hold blob hw/display: factor out the scanout blob to fb conversion MAINTAINERS: CC rust/ patches to qemu-rust list tests/tcg: Stop using exit() in the gdbstub testcases Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-11-18tests/tcg: Stop using exit() in the gdbstub testcasesIlya Leoshkevich3-6/+6
GDB 15 does not like exit() anymore: (gdb) python exit(0) Python Exception <class 'SystemExit'>: 0 Error occurred in Python: 0 Use the GDB's own exit command, like it's already done in a couple places, everywhere. This is the same fix as commit 93a3048dcf45 ("tests: Gently exit from GDB when tests complete"), but applied to more places. Acked-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-Id: <20241022113939.19989-1-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2024-11-18tests/tcg/s390x: Add the floating-point multiply-and-add testIlya Leoshkevich4-145/+420
Add a test to prevent regressions. Share some useful pieces with the vfminmax test. Remove the duplicates from the floating point class values. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-ID: <20241023000147.34035-3-iii@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2024-11-16tests/tcg: Test that sigreturn() does not corrupt the signal maskIlya Leoshkevich2-0/+54
Add a small test to prevent regressions. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20241108145237.37377-2-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05tests/tcg: Add SIGRTMIN/SIGRTMAX testIlya Leoshkevich2-2/+76
Test the lowest and the highest real-time signals. This requires configuring the real-time signal mapping, and therefore some knowledge about the host. To this end, pass the emulator path in the QEMU environment variable to all tests (this should not disturb the existing ones), and assume that all hosts have signals 36-39 available. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Message-ID: <20241029232211.206766-3-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-11-05tests/tcg: Replace -mpower8-vector with -mcpu=power8Ilya Leoshkevich1-5/+5
[1] deprecated -mpower8-vector, resulting in: powerpc64-linux-gnu-gcc: warning: switch '-mpower8-vector' is no longer supported qemu/tests/tcg/ppc64/vsx_f2i_nan.c:4:15: error: expected ';' before 'float' 4 | typedef vector float vsx_float32_vec_t; | ^~~~~~ Use -mcpu=power8 instead. In order to properly verify that this works, one needs a big-endian (the minimum supported CPU for 64-bit little-endian is power8 anyway) GCC configured with --enable-checking (see GCC commit e154242724b0 ("[RS6000] Don't pass -many to the assembler"). [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109987 Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20241023131250.48510-1-iii@linux.ibm.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-25Merge tag 'pull-maintainer-oct-misc-241024-1' of ↵Peter Maydell6-3/+144
https://gitlab.com/stsquad/qemu into staging testing, gdbstub and plugin updates - update MAINTAINERS with pointers to foo/next - add NOFETCH to help test custom docker builds - update microblaze toolchain with atomic fixes - update tsan build and documentation - don't restrict build-environment by arch unless needed - add cross-modifying code test - add tracepoints for cpu_step_atomic fallbacks - fix defaults for loongarch cross build - make check-[dco|patch] a little more verbose - fix gdbstub bug preventing aarch64_be-linux-user starting - add basic test for aarch64_be - clean up some gdbstub test scripts - fix qemu_plugin_reset # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmcaDeQACgkQ+9DbCVqe # KkRTlQgAlFaP1Nxa8y6pRZSL0WY9J3Znf5e2GDnVN3nJbfx1wZg7oZ4/dWieDF/Y # /9jLfMi8nDJ51tzH24PSASbHQ1xnblhuUfhRMwqAFhSwsZUb0VzdeGdq+FIyXQ5w # Cy2Ubz7g81qP/x9JRCCUGFfXaM1LSizsY1lNioRsDd533WJLkvxWucmpSN3XhxHJ # rEa3xI/qAcUah4G3yww47L+DmlKnJQcsihShRBC6Am2tWqxbz+1kBUaVfaVVo1if # IPN+bBk4eI1EHdRRyWJSsq3nELzqW4FJ3+9V0ifsOFW2KGsnkhbl0qUxqDmW5aBb # P9flEdpTfSiCbqp+IKG9vxJKuf/BGw== # =5Wui # -----END PGP SIGNATURE----- # gpg: Signature made Thu 24 Oct 2024 10:05:40 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-maintainer-oct-misc-241024-1' of https://gitlab.com/stsquad/qemu: plugins: fix qemu_plugin_reset MAINTAINERS: mention my plugins/next tree testing: Enhance gdb probe script tests/tcg/aarch64: Use raw strings for regexes in test-mte.py tests/tcg: enable basic testing for aarch64_be-linux-user config/targets: update aarch64_be-linux-user gdb XML list MAINTAINERS: mention my gdbstub/next tree gitlab: make check-[dco|patch] a little more verbose dockerfiles: fix default targets for debian-loongarch-cross accel/tcg: add tracepoints for cpu_loop_exit_atomic tests/tcg/x86_64: Add cross-modifying code test scripts/ci: remove architecture checks for build-environment updates docs/devel: update tsan build documentation meson: hide tsan related warnings MAINTAINERS: mention my testing/next tree tests/docker: add NOFETCH env variable for testing tests/docker: Fix microblaze atomics Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2024-10-24tests/tcg/aarch64: Use raw strings for regexes in test-mte.pyGustavo Romero1-2/+2
Use Python's raw string notation instead of string literals for regex so it's not necessary to double backslashes when regex special forms are used. Raw notation is preferred for regex and easier to read. Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20241015140806.385449-1-gustavo.romero@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-15-alex.bennee@linaro.org>
2024-10-24tests/tcg: enable basic testing for aarch64_be-linux-userAlex Bennée3-1/+58
We didn't notice breakage of aarch64_be because we don't have any TCG tests for it. However while the existing aarch64 compiler can target big-endian builds no one packages a BE libc. Instead we bang some rocks together to do the most basic of hello world with a nostdlib syscall test. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-14-alex.bennee@linaro.org>
2024-10-24tests/tcg/x86_64: Add cross-modifying code testIlya Leoshkevich2-0/+84
commit f025692c992c ("accel/tcg: Clear PAGE_WRITE before translation") fixed cross-modifying code handling, but did not add a test. The changed code was further improved recently [1], and I was not sure whether these modifications were safe (spoiler: they were fine). Add a test to make sure there are no regressions. [1] https://lists.gnu.org/archive/html/qemu-devel/2022-09/msg00034.html Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-Id: <20241001150617.9977-1-iii@linux.ibm.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20241023113406.1284676-8-alex.bennee@linaro.org>
generated by cgit v1.1 at 2025-08-04 06:09:23 +0000